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1. WO2007086304 - SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING SAME

Publication Number WO/2007/086304
Publication Date 02.08.2007
International Application No. PCT/JP2007/050688
International Filing Date 18.01.2007
IPC
H01L 21/8247 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8232Field-effect technology
8234MIS technology
8239Memory structures
8246Read-only memory structures (ROM)
8247electrically-programmable (EPROM)
H01L 27/115 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
10including a plurality of individual components in a repetitive configuration
105including field-effect components
112Read-only memory structures
115Electrically programmable read-only memories; Multistep manufacturing processes therefor
H01L 29/788 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66Types of semiconductor device
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76Unipolar devices
772Field-effect transistors
78with field effect produced by an insulated gate
788with floating gate
H01L 29/792 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66Types of semiconductor device
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76Unipolar devices
772Field-effect transistors
78with field effect produced by an insulated gate
792with charge trapping gate insulator, e.g. MNOS-memory transistor
CPC
G11C 16/0466
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
16Erasable programmable read-only memories
02electrically programmable
04using variable threshold transistors, e.g. FAMOS
0466comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
H01L 27/115
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
10including a plurality of individual components in a repetitive configuration
105including field-effect components
112Read-only memory structures ; [ROM] and multistep manufacturing processes therefor
115Electrically programmable read-only memories; Multistep manufacturing processes therefor
H01L 27/11568
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
10including a plurality of individual components in a repetitive configuration
105including field-effect components
112Read-only memory structures ; [ROM] and multistep manufacturing processes therefor
115Electrically programmable read-only memories; Multistep manufacturing processes therefor
11563with charge-trapping gate insulators, e.g. MNOS or NROM
11568characterised by the memory core region
H01L 29/40117
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
40Electrodes ; ; Multistep manufacturing processes therefor
401Multistep manufacturing processes
4011for data storage electrodes
40117the electrodes comprising a charge-trapping insulator
H01L 29/4234
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
40Electrodes ; ; Multistep manufacturing processes therefor
41characterised by their shape, relative sizes or dispositions
423not carrying the current to be rectified, amplified or switched
42312Gate electrodes for field effect devices
42316for field-effect transistors
4232with insulated gate
4234Gate electrodes for transistors with charge trapping gate insulator
H01L 29/66833
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
66007Multistep manufacturing processes
66075of devices having semiconductor bodies comprising group 14 or group 13/15 materials
66227the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
66409Unipolar field-effect transistors
66477with an insulated gate, i.e. MISFET
66833with a charge trapping gate insulator, e.g. MNOS transistors
Applicants
  • 日本電気株式会社 NEC Corporation [JP]/[JP] (AllExceptUS)
  • 寺井 真之 TERAI, Masayuki [JP]/[JP] (UsOnly)
Inventors
  • 寺井 真之 TERAI, Masayuki
Agents
  • 丸山 隆夫 MARUYAMA, Takao
Priority Data
2006-01586625.01.2006JP
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING SAME
(FR) DISPOSITIF SEMI-CONDUCTEUR ET SON PROCÉDÉ DE FABRICATION
(JA) 半導体装置および半導体装置の製造方法
Abstract
(EN)
A trap type memory element in which inflow of charges into a charge storage region from the outside, external diffusion of stored charges and outflow caused by a defect are suppressed. A gate conductor (6) is formed on a silicon substrate (1) through a multilayer insulating film consisting of a first gate insulating film (3), a charge storage layer (4), and a second gate insulating film (5). The multilayer insulating film (3-5) is projecting to the outside of the gate conductor (6) and extending below the outer end of a sidewall (8). The charge storage layer (4) has a high trap surface density region (4a) directly under the gate conductor, and a low trap surface density region (4b) on the outside of the gate conductor.
(FR)
La présente invention concerne un élément mémoire de type piège dans lequel l’introduction de charges dans une zone d’accumulation de charges depuis l’extérieur, la diffusion externe des charges accumulées et l’évacuation causée par un défaut sont supprimées. Un conducteur de gâchette (6) est disposé sur un substrat de silicium (1) à travers une pellicule isolante multicouche constituée d'une première pellicule d'isolation de gâchette (3), d'une couche d'accumulation de charges (4), et d’une seconde pellicule d’isolation de gâchette (5). La pellicule isolante multicouche (3-5) se projette vers l'extérieur du conducteur de gâchette (6) et s'étend en dessous de l'extrémité externe d'une paroi latérale (8). La couche d’accumulation de charges (4) comporte une zone de densité de surface de piégeage élevée (4a) directement sous le conducteur de gâchette, et une zone de densité de surface de piégeage faible (4b) à l’extérieur du conducteur de gâchette.
(JA)
 トラップ型メモリ素子において、電荷蓄積領域への外部からの電荷流入および蓄積電荷の外部拡散や欠陥に起因した流出を抑制する。  シリコン基板1上に、第1のゲート絶縁膜3、電荷蓄積層4、第2のゲート絶縁膜5からなる積層絶縁膜を介してゲート導電体6形成する。積層絶縁膜(3~5)はゲート導電体6の外側に突出してサイドウォール8の外端部下まで延在している。電荷蓄積層4は、ゲート導電体直下の高トラップ面密度領域4aとゲート導電体外側の低トラップ面密度領域4bを有する。
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