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1. (WO2007074556) ACTIVE MATRIX SUBSTRATE, DISPLAY DEVICE, TELEVISION RECEIVER, AND METHOD FOR REPAIRING DEFECTS OF ACTIVE MATRIX SUBSTRATE
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2007/074556 International Application No.: PCT/JP2006/315030
Publication Date: 05.07.2007 International Filing Date: 28.07.2006
IPC:
G09F 9/30 (2006.01) ,G02F 1/1337 (2006.01) ,G02F 1/1343 (2006.01) ,G02F 1/1368 (2006.01) ,H01L 21/3205 (2006.01) ,H01L 23/52 (2006.01) ,H01L 29/786 (2006.01)
Applicants: TSUBATA, Toshihide; null (UsOnly)
OKADA, Yoshihiro; null (UsOnly)
BAN, Atsushi; null (UsOnly)
SUGIHARA, Toshinori; null (UsOnly)
SHARP KABUSHIKI KAISHA[JP/JP]; 22-22, Nagaike-cho, Abeno-ku, Osaka-shi Osaka 5458522, JP (AllExceptUS)
Inventors: TSUBATA, Toshihide; null
OKADA, Yoshihiro; null
BAN, Atsushi; null
SUGIHARA, Toshinori; null
Agent: HARAKENZO WORLD PATENT & TRADEMARK; Daiwa Minamimorimachi Building Tenjinbashi 2-chome Kita Kita-ku, Osaka-shi Osaka5300041, JP
Priority Data:
2005-37348526.12.2005JP
Title (EN) ACTIVE MATRIX SUBSTRATE, DISPLAY DEVICE, TELEVISION RECEIVER, AND METHOD FOR REPAIRING DEFECTS OF ACTIVE MATRIX SUBSTRATE
(FR) SUBSTRAT À MATRICE ACTIVE, DISPOSITIF D'AFFICHAGE, RÉCEPTEUR DE TÉLÉVISION ET PROCÉDÉ DE RÉPARATION DE DÉFAUTS DU SUBSTRAT À MATRICE ACTIVE
(JA) アクティブマトリクス基板、表示装置、テレビジョン受像機、アクティブマトリクス基板の欠陥修正方法
Abstract: front page image
(EN) An active matrix substrate (10) comprises a transistor (12), a pixel electrode (17) connected to one of conductive electrodes (8) of the transistor (12), a hold capacitor wiring (18), a lead wiring (7) extended from the one of conductive electrodes (8) of the transistor (12), and a repair wiring (19) extended from the hold capacitor wiring (18) and overlapping a part of the lead wiring (7) with an insulating layer in between. This enables a TFT failure (for example, a short circuit between a source electrode and a drain electrode) to be repaired, high-speed display to be performed, and power consumption to be suppressed.
(FR) L'invention concerne un substrat à matrice active (10) qui comprend un transistor (12), une électrode de pixel (17) reliée à l'une parmi des électrodes conductrices (8) du transistor (12), un câblage de condensateur de maintien (18), un câblage de fil (7) qui fait saillie dudit électrode conductrice (8) du transistor (12), et un câblage de réparation (19) qui fait saillie du câblage de condensateur de maintien (18) et chevauche une partie du câblage de fil (7), une couche isolante se trouvant entre ceux-ci. Ceci permet de réparer une défaillance de transistor TFT (par exemple un court-circuit entre une électrode de source et une électrode de drain), d'effectuer un affichage à haute vitesse et de diminuer la consommation d'énergie.
(JA) not available
Designated States: AE, AG, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BW, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LV, LY, MA, MD, MG, MK, MN, MW, MX, MZ, NA, NG, NI, NO, NZ, OM, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (EPO) (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IS, IT, LT, LU, LV, MC, NL, PL, PT, RO, SE, SI, SK, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)