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1. WO2007045532 - FIELD EFFECT TRANSISTORS (FETS) WITH INVERTED SOURCE/DRAIN METALLIC CONTACTS, AND METHOD OF FABRICATING SAME

Publication Number WO/2007/045532
Publication Date 26.04.2007
International Application No. PCT/EP2006/066530
International Filing Date 20.09.2006
IPC
H01L 21/768 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
71Manufacture of specific parts of devices defined in group H01L21/7086
768Applying interconnections to be used for carrying current between separate components within a device
CPC
H01L 21/76804
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
71Manufacture of specific parts of devices defined in group H01L21/70
768Applying interconnections to be used for carrying current between separate components within a device ; comprising conductors and dielectrics
76801characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
76802by forming openings in dielectrics
76804by forming tapered via holes
H01L 29/6659
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
66007Multistep manufacturing processes
66075of devices having semiconductor bodies comprising group 14 or group 13/15 materials
66227the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
66409Unipolar field-effect transistors
66477with an insulated gate, i.e. MISFET
66568Lateral single gate silicon transistors
66575where the source and drain or source and drain extensions are self-aligned to the sides of the gate
6659with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
H01L 29/7833
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
76Unipolar devices ; , e.g. field effect transistors
772Field effect transistors
78with field effect produced by an insulated gate
7833with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
H01L 2924/0002
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2924Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
0001Technical content checked by a classifier
0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Applicants
  • INTERNATIONAL BUSINESS MACHINES CORPORATION [US]/[US] (AllExceptUS)
  • IBM UNITED KINGDOM LIMITED [GB]/[GB] (MG)
  • BELYANSKY, Michael [US]/[US] (UsOnly)
  • CHIDAMBARRAO, Dureseti [US]/[US] (UsOnly)
  • CLEVENGER, Lawrence [US]/[US] (UsOnly)
  • KUMAR, Kaushik [IN]/[US] (UsOnly)
  • RADENS, Carl [US]/[US] (UsOnly)
Inventors
  • BELYANSKY, Michael
  • CHIDAMBARRAO, Dureseti
  • CLEVENGER, Lawrence
  • KUMAR, Kaushik
  • RADENS, Carl
Agents
  • LING, Christopher, John
Priority Data
11/163,52321.10.2005US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) FIELD EFFECT TRANSISTORS (FETS) WITH INVERTED SOURCE/DRAIN METALLIC CONTACTS, AND METHOD OF FABRICATING SAME
(FR) TRANSISTORS À EFFET DE CHAMP (FET) AVEC CONTACTS MÉTALLIQUES DE SOURCE/DRAIN INVERSÉS ET SON PROCÉDÉ DE FABRICATION
Abstract
(EN)
The present invention relates to an field effect transistor (FET) comprising an inverted source/drain metallic contact that has a lower portion located in a first, lower dielectric layer and an upper portion located in a second, upper dielectric layer. The lower portion of the inverted source/drain metallic contact has a larger cross-sectional area than the upper portion. Preferably, the lower portion of the inverted source/drain metallic contact has a cross-sectional area ranging from about 0.03 µm2 to about 3.15 µm2, and such an inverted source/drain metallic contact is spaced apart from a gate electrode of the FET by a distance ranging from about 0.001 µm to about 5 µm.
(FR)
La présente invention concerne un transistor à effet de champ (FET) comprenant un contact métallique de source/drain inversé qui comporte une portion inférieure située dans une première couche diélectrique inférieure et une portion supérieure située dans une seconde couche diélectrique supérieure. La portion inférieure du contact métallique de source/drain inversé comporte une aire de section transversale supérieure à celle de la portion supérieure. De préférence, la portion inférieure du contact métallique de source/drain inversé comporte une aire de section transversale comprise entre environ 0,03 µm2 et environ 3,15 µm2, et un tel contact métallique de source/drain inversé est séparé d'une électrode de gâchette du FET par une distance comprise entre environ 0,001 µm et environ 5 µm.
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