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Machine translation
1. (WO2007022469) PARALLEL COMPUTER ARCHITECTURE FOR COMPUTATION OF PARTICLE INTERACTIONS
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2007/022469    International Application No.:    PCT/US2006/032498
Publication Date: 22.02.2007 International Filing Date: 18.08.2006
Chapter 2 Demand Filed:    17.07.2007    
IPC:
G06F 15/173 (2006.01)
Applicants: D.E. SHAW RESEARCH, LLC [US/US]; 39th Floor, Tower 45, 120 West Forty-Fifth Street, New York, New York 10036 (US) (For All Designated States Except US).
DENEROFF, Martin, M.; (For US Only).
DROR, Ron [US/US]; (US) (For US Only).
BOWERS, Kevin, J. [US/US]; (US) (For US Only)
Inventors: DENEROFF, Martin, M.; .
DROR, Ron; (US).
BOWERS, Kevin, J.; (US)
Agent: ROHLICEK, J. Robin; Occhiuti Rohlicek & Tsao LLP, 10 Fawcett Street, Cambridge, MA 02138 (US)
Common
Representative:
D.E. SHAW RESEARCH, LLC; 39th Floor, Tower 45, 120 West Forty-Fifth Street, New York, New York 10036 (US)
Priority Data:
60/709,184 18.08.2005 US
60/756,448 04.01.2006 US
PCT/US2006/014782 19.04.2006 US
Title (EN) PARALLEL COMPUTER ARCHITECTURE FOR COMPUTATION OF PARTICLE INTERACTIONS
(FR) STRUCTURES DE CALCUL D'INTERACTIONS ENTRE PARTICULES
Abstract: front page image
(EN)An architecture for computation of particle interactions makes use various forms of parallelism. In one implementation, the parallelism involves using multiple computation nodes arranged according to a geometric partitioning of a simulation volume. These computation nodes together, in a distributed manner, coordinate computation of the particle interactions. Nodes each include a group of subsystems, including a processor subsystem, a computation subsystem, and a memory subsystem, as well as a communication subsystem linking the subsystems of the group of subsystems and providing at least part of a link between subsystems of the node and subsystems of other processing nodes of the processing system. The computation system includes an array of processing modules arranged into one or more serially interconnected processing groups of the processing modules. Each of the processing module includes a storage for data elements and includes circuitry for performing pairwise computations between data elements, each of the pairwise computations making use a data element from the storage of the processing module and a data element passing through the serially interconnected processing modules.
(FR)L'invention porte sur une structure de calcul d'interactions entre particules utilisant différentes formes de parallélisme. Dans une exécution, le parallélisme implique le recours à de multiples noeuds de calcul disposés selon le découpage géométrique du volume de simulation. Ces noeuds de calcul coordonnent ensemble, par répartition, le calcul des interactions entre particules. Chacun des noeuds comprend un groupe de sous-systèmes dont un sous-système de traitement, un sous-système de calcul, un sous-système de mémorisation, et un sous-système de communication reliant ensemble les autres sous-systèmes du noeud et assurant une partie des liaisons entre les sous-systèmes du noeud et les autres noeuds de traitement du système de traitement. Le système de calcul comporte un réseau de modules de calcul comprenant un ou plusieurs groupes de traitement des modules de traitement montée en série. Chacun des modules de traitement comporte une mémoire d'éléments de données et un circuit d'exécution de calculs entre les éléments de données, lesdits calculs par paire utilisant un élément de données provenant de la mémoire du module de traitement, et un élément de données traversant les modules de traitement montés en série.
Designated States: AE, AG, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BW, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LV, LY, MA, MD, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, SV, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IS, IT, LT, LU, LV, MC, NL, PL, PT, RO, SE, SI, SK, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language: English (EN)
Filing Language: English (EN)