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Pub. No.:    WO/2007/013132    International Application No.:    PCT/JP2005/013607
Publication Date: 01.02.2007 International Filing Date: 25.07.2005
G11C 16/30 (2006.01)
Applicants: SPANSION LLC [US/US]; One AMD Place, P.O.Box 3453, Sunnyvale California 940883453 (US) (For All Designated States Except US).
Spansion Japan Limited [JP/JP]; 6, Kogyodanchi, Monden-machi, Aizuwakamatsu-shi, F ukushima 9650845 (JP) (For All Designated States Except US).
OKADA, Akira [JP/JP]; (JP) (For US Only).
YANO, Masaru [JP/JP]; (JP) (For US Only).
KUROSAKI, Kazuhide [JP/JP]; (JP) (For US Only)
Inventors: OKADA, Akira; (JP).
YANO, Masaru; (JP).
KUROSAKI, Kazuhide; (JP)
Agent: KATAYAMA, Shuhei; Mitsui Sumitomo Marine Tepco Building 6-1, Kyobashi 1-chome, Chuo-ku Tokyo 1040031 (JP)
Priority Data:
(JA) 半導体装置およびその制御方法
Abstract: front page image
(EN)There is provided a semiconductor device including; a pump circuit (10) for boosting an output node connected to a memory cell array; an oscillator (12) for outputting clock to the pump circuit; and a detection circuit (16) for operating the oscillator if the voltage of an output node (17) of the pump circuit is lower than a first reference voltage and stopping the oscillator if the voltage of the output node is higher than a second reference voltage. A control method of the semiconductor device is also disclosed. The oscillator is stopped when the voltage of the output node of the pump circuit is equal to or greater than a target voltage. For this, the pump circuit is also stopped. Accordingly, there is no case that unnecessary charge flows to the ground. Thus, it is possible to reduce power consumption of the boosting circuit.
(FR)Dispositif à semi-conducteur comprenant les éléments suivants: circuit de pompe (10) survoltant un noeud de sortie connecté à un ensemble de cellules de mémoire; oscillateur (12) envoyant un signal d'horloge au circuit de pompe; et circuit de détection (16) enclenchant l'oscillateur si la tension du noeud de sortie (17) du circuit de pompe est inférieure à une première tension de référence et en coupant l'oscillateur si cette même tension est supérieure à une second tension de référence. L'invention concerne également un procédé de commande du dispositif à transistor. L'oscillateur est coupé lorsque la tension du noeud de sortie du circuit de pompe est égale ou supérieure à une tension cible. A cette fin, on coupe également le circuit de pompe. Par voie de conséquence, il n'y a par de charge superflue qui passe à la terre. Il est donc possible de réduire la consommation de courant du circuit survolteur.
Designated States: AE, AG, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BW, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KP, KR, KZ, LC, LK, LR, LS, LT, LU, LV, MA, MD, MG, MK, MN, MW, MX, MZ, NA, NG, NI, NO, NZ, OM, PG, PH, PL, PT, RO, RU, SC, SD, SE, SG, SK, SL, SM, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, YU, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IS, IT, LT, LU, LV, MC, NL, PL, PT, RO, SE, SI, SK, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)