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1. WO2007009912 - METHOD FOR TESTING ANALOG-TO-DIGITAL CONVERTERS

Note: Text based on automatic Optical Character Recognition processes. Please use the PDF version for legal matters

Claims
1. Method for characterising and/or testing on-chip and/or on-board an analog-to-digital conversion device (10) that performs a conversion operation {f(.))r of the type that includes at least one input stage configured to perform an analog integration operation, and at least one digital conversion stage, and that also supplies (21) an integer number (N) of samples of a digital characterisation signal (S) , characterised in that it provides for the following operations :
supplying (21) said integer number (N) of samples of a digital characterisation signal (S) as input to said analog integration operation, said digital characterisation signal (S) being a multi-level rectangular wave signal with variable duty cycle (η(i)); varying (211, 212, 213) said variable duty cycle (7(0) f°r each sample (i) of said digital characterisation signal (S) ;
- acquiring (22) N corresponding output samples ( q(i) ) from said conversion operation (f{.)) and analysing said N corresponding input samples ( q(i) ) to determine parameters characterising said conversion operation ( f ( . ) ) .
2. Method according to claim 1, characterised in that:
- said variation operation (211, 212, 213) of the duty cycle η{i) of the digital characterisation signal

(S) includes linearly varying the duty cycle as a function of an index (i) assigned to each successive digital characterisation signal sample (S) ;
- said analysis operation (22) of the output samples iqi})) of said conversion operation (f(.)) includes a polynomial regression operation.
3. Method according to claim 2, characterised in that said polynomial regression operation employs a third-degree polynomial interpolator

( a0 + O1X+ a2x2 + aQx3 +n = f(x) ) .
4. Method according to claim 2 or claim 3, characterised in that from said polynomial regression operation parameters for characterising the analog-to-digital converter are obtained by selecting from a set including offset, gain, second and third harmonic distortion, noise.
5. Method according to claim 1, characterised in that:
- said variation operation (211, 212, 213) of the duty cycle η{ϊ) of the digital characterisation signal

(S) includes applying a sinusoidal modulation

{ to said duty cycle η(i) of the

digital characterisation signal (S) as a function of an index (i) assigned to each successive sample of the digital characterisation signal (S) ;
- said analysis operation (22) of the output samples ( <?(0 ) from said conversion operation f ( . ) ) includes applying a spectral analysis operation ( 3(t/(/) } , in particular a Fourier transform operation, to the output samples ( q(i) } - 6. Method according to claim 5, characterised in that it includes the operation of applying said spectral analysis operation ( 3(^(/)) ) also to the digital characterisation signal (S) and of calculating the difference ( 3(q(/)) ~ 3(?7(/)) ) between the results of applying the spectral analysis operation respectively to the output samples ( q(i) ) and to the digital characterisation signal (S) in order to represent the harmonic behaviour of the anaiog-to-digital converter (10) .

7. Method according to any of the claims from 1 to 6, characterised in that said analog integration operation is performed through switched capacitors.
8. Circuit for the characterisation and/or testing on-chip and/or on-board of an analog-to-digital conversion device (10) that performs a conversion operation (f(.)), of the type that includes at least one input stage configured to perform an analog integration operation, and at least one digital conversion stage, comprising a generator (21) of an integer number (N) of samples of a digital characterisation signal (S) , characterised in that said generator (21) supplies said integer number (N) of samples of a digital characterisation signal (S) to said input stage of the analog-to-digital conversion device (10), said generator (21) being configured to generate a multi-level rectangular digital characterisation signal (S) with variable duty cycle (7(0) and that said generator (21) includes one or more modules (211, 212, 213) to vary said variable duty cycle (r/(i)} for each sample (i) of said digital characterisation signal (S) ;
- said circuit also includes an acguisition and analysis module (22) of K corresponding output samples (<?(*)) from said analog-to-digital conversion device

(10) .
9. Circuit according to claim 8, characterised in that said one or more modules (211, 212, 213) to vary said variable duty cycle (7(0) f°r each sample (i) of said digital characterisation signal (S) are configured to vary the duty cycle of the digital characterisation signal (S) in a linear manner; said acquisition and analysis module (22) of the output samples [ q(i) ) from said analog-to-digital conversion device (10, f ( . ) ) is configured to perform a polynomial regression operation .
10. Circuit according to claim 8, characterised in that said one or more modules (211, 212, 213) to vary said variable duty cycle (7(0) for each sample (i) of said digital characterisation signal (S) are configured to vary the duty cycle of the digital characterisation signal (S) according to a sinusoidal modulation; said acquisition and analysis module (22) of the output samples (q(i)) from said analog-to-digital conversion device {10, f(.)) is configured to perform a spectral analysis operation.
11. Circuit according to claim 9 or claim 10, characterised in that said one or more modules (211, 212, 213) to vary said variable duty cycle ( τ/(0 ) for each sample (i) of said digital characterisation signal (S) comprise:
a sequence generator (212) operating at a sampling frequency (F3) of the analog-to-digital conversion device (10, f{.)) and generating a sequence (B) representative of said variable duty cycle ( η(ϊ) ) ;
a counter (211) operating at a frequency that is a multiple of the sampling frequency (Fs) and generating a count signal (A) ;
a comparator (213) configured to compare said sequence (B) representative of said variable duty cycle

(rj(i)) and said count signal (A) and provide as output said digital characterisation signal (S) .
12. Circuit according to claim 11, characterised in that said counter (211) operating at a frequency that is a multiple of the sampling frequency (F3) and generating a count signal (A) is obtained from a counter available in said analog-to-digital conversion device .
13. Circuit according to claim 11 or claim 12, characterised in that it includes an analog multiplexer (30) to generate a binary signal as input with calibrated levels (VrefL, VrefH) .
14. Circuit according to any of the claims from 8 to 13, characterised in that at least in part it is implemented through an FPGA (Field Programmable Gate Array) module.
15. Circuit configured to implement the method according to one or more of the claims from 1 to 7.
16. Digital characterisation signal generated according either to the method of one or more of the claims from 1 to 7 or in the circuit of one or more of the claims from 8 to 15, characterised in that it is a form of binary wave with calibrated levels, rectangular, of period coinciding with or a submultiple of a sampling period (T) of the digital conversion device and with variable duty cycle, in particular a signal of the PWM (Pulse Width Modulation) type.
17. Computer program product directly loadable into the memory of at least one electronic computer and including software code portions for performing the method according to any of the claims from 1 to 7.
18. Computer program product according to claim 17 characterised in that it implements said polynomial regression operation.