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1. (WO2007008816) FLAT PANEL DISPLAY INCORPORATING A CONTROL FRAME
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2007/008816 International Application No.: PCT/US2006/026760
Publication Date: 18.01.2007 International Filing Date: 11.07.2006
IPC:
H01J 1/62 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
J
ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
1
Details of electrodes, of magnetic control means, of screens, or of the mounting or spacing thereof, common to two or more basic types of discharge tubes or lamps
54
Screens on or from which an image or pattern is formed, picked-up, converted, or stored; Luminescent coatings on vessels
62
Luminescent screens; Selection of materials for luminescent coatings on vessels
Applicants:
COPYTELE, INC. [US/US]; 900 Walt Whitman Road Melville, NY 11747, US (AllExceptUS)
DISANTO, Frank, J. [US/US]; US (UsOnly)
KRUSOS, Denis, A. [US/US]; US (UsOnly)
Inventors:
DISANTO, Frank, J.; US
KRUSOS, Denis, A.; US
Agent:
DARCY, Jonthan, M.; PLEVY, HOWARD & DARCY, PC P.O. Box 226 Fort Washington, DC 19034, US
Priority Data:
60/698,04711.07.2005US
60/715,19108.09.2005US
Title (EN) FLAT PANEL DISPLAY INCORPORATING A CONTROL FRAME
(FR) ECRAN PLAT COMPRENANT UNE STRUCTURE DE COMMANDE
Abstract:
(EN) A flat panel display including: a plurality of electrically addressable pixels; a plurality of thin-film transistor driver circuits each being electrically coupled to an associated at least one of the pixels, respectively; a passivating layer on the thin-film transistor driver circuits and at least partially around the pixels; a conductive frame on the passivating layer; and, a plurality of nanostructures on the conductive frame; wherein, exciting the conductive frame and addressing one of the pixels using the associated driver circuit causes the nanostructures to emit electrons that induce the one of the pixels to emit light.
(FR) L'invention concerne un écran plat comprenant: une pluralité de pixels adressables électriquement; une pluralité de circuits d'attaque de transistor à film mince, chacun étant couplé électriquement à au moins un des pixels associé, respectivement; une couche de passivation, appliquée sur les circuits d'attaque de transistor à film mince et au moins partiellement autour des pixels; une structure conductrice sur la couche de passivation; et une pluralité de nanostructures sur la structure conductrice. Lorsqu'un circuit d'attaque excite la structure conductrice et adresse l'un des pixels associé, les nanostructures émettent des électrons qui induisent l'émission de lumière par le pixel.
front page image
Designated States: AE, AG, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BW, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LV, LY, MA, MD, MG, MK, MN, MW, MX, MZ, NA, NG, NI, NO, NZ, OM, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IS, IT, LT, LU, LV, MC, NL, PL, PT, RO, SE, SI, SK, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)