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1. (WO2007008344) INTEGRATED CIRCUIT EMBODYING A NON-VOLATILE MEMORY CELL
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2007/008344 International Application No.: PCT/US2006/023705
Publication Date: 18.01.2007 International Filing Date: 19.06.2006
IPC:
H01L 27/115 (2006.01) ,H01L 21/8247 (2006.01) ,H01L 29/788 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04
the substrate being a semiconductor body
10
including a plurality of individual components in a repetitive configuration
105
including field-effect components
112
Read-only memory structures
115
Electrically programmable read-only memories
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78
with subsequent division of the substrate into plural individual devices
82
to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822
the substrate being a semiconductor, using silicon technology
8232
Field-effect technology
8234
MIS technology
8239
Memory structures
8246
Read-only memory structures (ROM)
8247
electrically-programmable (EPROM)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
788
with floating gate
Applicants:
SANDISK 3D LLC [US/US]; 140 Caspian Court Sunnyvale, CA 94089, US (AllExceptUS)
BANDYOPADHYAY, Abhijit [IN/US]; US (UsOnly)
PETTI, Christopher J. [US/US]; US (UsOnly)
KUMAR, Tanmay [IN/US]; US (UsOnly)
Inventors:
BANDYOPADHYAY, Abhijit; US
PETTI, Christopher J.; US
KUMAR, Tanmay; US
Agent:
VON WOHLD, Rick; SanDisk Corporation 601 McCarthy Blvd. Milpitas, CA 95035, US
Priority Data:
11/175,68806.07.2005US
Title (EN) INTEGRATED CIRCUIT EMBODYING A NON-VOLATILE MEMORY CELL
(FR) CIRCUIT INTEGRE COMPRENANT UNE CELLULE DE MEMOIRE NON VOLATILE
Abstract:
(EN) An integrated circuit is provided including at least one memory cell. Such memory cell, in turn, includes a transistor and a capacitor. The transistor includes a source, a drain, and a gate. Further, the capacitor includes a well and a gate. The gate of the transistor remains in communication with the gate of the capacitor. In various other embodiments, the memory cell includes a transistor and a capacitor including wells of differing types (e.g. P-type, N-type). In such embodiments, the well of the transistor abuts the well of the capacitor. In still further embodiments, for a more compact design, a diffusion region of the transistor is situated less than 2.5µm from a diffusion region of the capacitor.
(FR) L'invention concerne un circuit intégré comprenant au moins une cellule de mémoire. Ladite cellule de mémoire, à son tour, comprend un transistor et un condensateur. Le transistor comprend une source, un drain, et une grille. En outre, le condensateur comprend un puis et une grille. La grille du transistor reste en communication avec la grille du condensateur. Dans divers autres modes de réalisation, la cellule de mémoire comprend un transistor et un condensateur comprenant des puits de types différents (par ex., type P, type N). Dans lesdits modes de réalisation, le puits du transistor bute contre le puits du condensateur. Dans d'autres modes de réalisation encore, pour une conception plus compacte, une région de diffusion du transistor est située à moins de 2,5 µm d'une région de diffusion du condensateur.
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Designated States: AE, AG, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BW, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LV, LY, MA, MD, MG, MK, MN, MW, MX, MZ, NA, NG, NI, NO, NZ, OM, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IS, IT, LT, LU, LV, MC, NL, PL, PT, RO, SE, SI, SK, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)