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1. (WO2007005189) SOURCE SIDE INJECTION STORAGE DEVICE AND METHOD THEREFOR
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2007/005189 International Application No.: PCT/US2006/022277
Publication Date: 11.01.2007 International Filing Date: 08.06.2006
IPC:
H01L 21/8238 (2006.01) ,H01L 21/335 (2006.01) ,H01L 21/3205 (2006.01) ,H01L 21/4763 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78
with subsequent division of the substrate into plural individual devices
82
to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822
the substrate being a semiconductor, using silicon technology
8232
Field-effect technology
8234
MIS technology
8238
Complementary field-effect transistors, e.g. CMOS
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334
Multistep processes for the manufacture of devices of the unipolar type
335
Field-effect transistors
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31
to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
3205
Deposition of non-insulating-, e.g. conductive- or resistive-, layers, on insulating layers; After-treatment of these layers
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
34
the devices having semiconductor bodies not provided for in groups H01L21/06, H01L21/16, and H01L21/18159
46
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/36-H01L21/428142
461
to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
4763
Deposition of non-insulating-, e.g. conductive-, resistive-, layers on insulating layers; After-treatment of these layers
Applicants:
FREESCALE SEMICONDUCTOR [US/US]; 6501 William Cannon Drive West Austin, TX 78735, US (AllExceptUS)
HONG, Cheong, M. [MY/US]; US (UsOnly)
CHINDALORE, Gowrishankar, L. [IN/US]; US (UsOnly)
Inventors:
HONG, Cheong, M.; US
CHINDALORE, Gowrishankar, L.; US
Agent:
KING, Robert, L. ; 7700 W. Parmer Lane, MD:PL02 Austin, Texas 7877, US
Priority Data:
11/170,44629.06.2005US
Title (EN) SOURCE SIDE INJECTION STORAGE DEVICE AND METHOD THEREFOR
(FR) DISPOSITIF DE MEMOIRE A INJECTION PAR LE COTE SOURCE ET PROCEDE CORRESPONDANT
Abstract:
(EN) A storage device (10) has a two bit cell in which the select electrode (52) is nearest the channel between two storage layers (38, 40). Individual control electrodes (20, 22) are over individual storage layers (38, 40). Adjacent cells are separated by a doped region (34) that is shared between the adjacent cells. The doped region (34) is formed by an implant in which the control gates (22, 24) of adjacent cells are used as a mask. This structure provides for reduced area while retaining the ability to perform programming by source side injection.
(FR) Un dispositif de mémoire (10) comprend une cellule à deux bits dans laquelle l'électrode de sélection (52) est la plus proche du passage situé entre deux couches mémoire (38, 40). Des électrodes de commande individuelles (20, 22) sont situées sur les couches mémoire individuelles (38, 40). Des cellules adjacentes sont séparées par une région dopée (34) qui est partagée entre les cellules adjacentes. La région dopée (34) est formée par un implant dans lequel les portes de commande (22, 24) des cellules adjacentes font office de masque. Cette structure assure une surface réduite tout en maintenant l'aptitude à effectuer la programmation par injection du côté source.
front page image
Designated States: AE, AG, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BW, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LC, LK, LR, LS, LT, LU, LV, LY, MA, MD, MG, MK, MN, MW, MX, MZ, NA, NG, NI, NO, NZ, OM, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IS, IT, LT, LU, LV, MC, NL, PL, PT, RO, SE, SI, SK, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)