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1. (WO2007003852) FLAT DISPLAY ACTIVE PLATE
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2007/003852 International Application No.: PCT/FR2006/050650
Publication Date: 11.01.2007 International Filing Date: 29.06.2006
IPC:
H01L 27/12 (2006.01) ,H01L 21/77 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12
the substrate being other than a semiconductor body, e.g. an insulating body
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
Applicants:
CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE [FR/FR]; 3, Rue Michel Ange F-75794 Paris Cedex 16, FR (AllExceptUS)
ECOLE POLYTECHNIQUE [FR/FR]; Route De Saclay F-91128 Palaiseau Cedex, FR (AllExceptUS)
PRIBAT, Didier [FR/FR]; FR (UsOnly)
COJOCARU, Costel Sorin [RO/FR]; FR (UsOnly)
Inventors:
PRIBAT, Didier; FR
COJOCARU, Costel Sorin; FR
Agent:
CABINET BEAUMONT; 1, Rue Champollion F-38000 Grenoble, FR
Priority Data:
055183930.06.2005FR
Title (EN) FLAT DISPLAY ACTIVE PLATE
(FR) PLAQUE ACTIVE D'ECRAN PLAT
Abstract:
(EN) The invention concerns a method for making a matrix flat display active plate, wherein each cell comprises an electrode plate (1), connected by a transistor (2) to a first conductive line, including the following steps: providing a protuberance (11) coated with insulation of each first conductive line at each cell; etching or making porous an end part of each protuberance; growing by VLS process a p-i-p or n-i-n semiconductor structure in each etched or porous end part; and establishing a contact at the free end of the semiconductor structure and forming a gate at the median part of the semiconductor structure.
(FR) L'invention concerne un procédé de fabrication de la plaque active d'un écran plat matriciel, dans lequel chaque cellule comprend une plaque d'électrode (1) connectée par un transistor (2) à une première ligne conductrice, comprenant les étapes suivantes : prévoir une excroissance (11) enrobée d'isolant de chaque première ligne conductrice au niveau de chaque cellule ; graver ou rendre poreuse une partie d'extrémité de chaque excroissance ; faire croître par un procédé VLS une structure semi- conductrice PIP ou NIN dans chaque partie d'extrémité gravée ou rendue poreuse ; et établir un contact à l'extrémité libre de la structure semiconductrice et former une grille au niveau de la partie médiane de la structure semiconductrice.
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Designated States: AE, AG, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BW, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LV, LY, MA, MD, MG, MK, MN, MW, MX, MZ, NA, NG, NI, NO, NZ, OM, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IS, IT, LT, LU, LV, MC, NL, PL, PT, RO, SE, SI, SK, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG)
Publication Language: French (FR)
Filing Language: French (FR)
Also published as:
KR1020080031359EP1902469JP2009501347US20100203686FR2888041