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1. (WO2007000697) METHOD OF MANUFACTURING AN ASSEMBLY AND ASSEMBLY
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2007/000697 International Application No.: PCT/IB2006/052040
Publication Date: 04.01.2007 International Filing Date: 23.06.2006
IPC:
H01L 21/48 (2006.01) ,H01L 25/065 (2006.01) ,H01L 21/98 (2006.01) ,H01L 21/68 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
48
Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/06-H01L21/326201
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03
all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04
the devices not having separate containers
065
the devices being of a type provided for in group H01L27/78
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
98
Assembly of devices consisting of solid state components formed in or on a common substrate; Assembly of integrated circuit devices
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
67
Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
68
for positioning, orientation or alignment
Applicants:
KONINKLIJKE PHILIPS ELECTRONICS N.V. [NL/NL]; Groenewoudseweg 1 NL-5621 BA Eindhoven, NL (AllExceptUS)
DEKKER, Ronald [NL/NL]; NL (UsOnly)
DE SAMBER, Marc, A. [BE/BE]; NL (UsOnly)
DE HAAS, Wilhelmus, H. [NL/NL]; NL (UsOnly)
MICHIELSEN, Theodorus, M. [NL/NL]; NL (UsOnly)
SCHOOFS, Franciscus, A., C., M. [NL/NL]; NL (UsOnly)
VAN VEEN, Nicolaas, . J., A. [NL/NL]; NL (UsOnly)
Inventors:
DEKKER, Ronald; NL
DE SAMBER, Marc, A.; NL
DE HAAS, Wilhelmus, H.; NL
MICHIELSEN, Theodorus, M.; NL
SCHOOFS, Franciscus, A., C., M.; NL
VAN VEEN, Nicolaas, . J., A.; NL
Agent:
NOLLEN, Maarten, D-J.; Prof. Holstlaan 6 NL-5656 AA Eindhoven, NL
Priority Data:
05105838.629.06.2005EP
Title (EN) METHOD OF MANUFACTURING AN ASSEMBLY AND ASSEMBLY
(FR) ENSEMBLE ET PROCEDE DE FABRICATION
Abstract:
(EN) The assembly (100) comprises a laterally limited semiconductor substrate region (15) in which an electrical element (20) is defined. Thereon, an interconnect structure (21) is present. This is provided, at its first side (101) with contact pads (25,26) for coupling to an electric device (30), and at its second side (102) with connections (20) to the electrical element (11). Terminals (52,53) are present at the second side (102) of the interconnect structure (21), and coupled to the interconnect structure (21) through extensions (22,23) that are laterally displaced and isolated from the semiconductor substrate region (15). An electric device (30) is assembled to the first side (101) of the interconnect structure (21), and an encapsulation (40) extending on the first side (101) of the interconnect structure (21) so as to support it and encapsulating the electric device (30) is present.
(FR) Cet ensemble (100) comprend une région (15) de substrat semi-conducteur latéralement limité dans laquelle est défini un élément électrique (20) garni d'une structure d'interconnexion (21). Son premier côté (101) est pourvu de pavés de contacts (25, 26) pour le couplage à un dispositif électrique, l'autre côté (102) étant pourvu de connexions'20) avec l'élément électrique (11). Ce deuxième côté (102) de la structure d'interconnexion (21) est pourvu de bornes (52, 53) couplées à la structure d'interconnexion (21) par des prolongements (22, 23) latéralement décalés et isolés de la région (15) de substrat semi-conducteur. Un dispositif électrique (30) est assemblé sur la premier côté (101) de la structure d'interconnexion (21). Une inclusion (40) occupant le premier côté (101) de la structure d'interconnexion (21) lui sert de support et englobe le dispositif électrique (30).
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Designated States: AE, AG, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BW, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LV, LY, MA, MD, MG, MK, MN, MW, MX, MZ, NA, NG, NI, NO, NZ, OM, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IS, IT, LT, LU, LV, MC, NL, PL, PT, RO, SE, SI, SK, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)
Also published as:
KR1020080021703EP1900018JP2009500820US20100164079CN101208789IN6065/CHENP/2007