PATENTSCOPE will be unavailable a few hours for maintenance reason on Tuesday 19.11.2019 at 4:00 PM CET
Search International and National Patent Collections
Some content of this application is unavailable at the moment.
If this situation persists, please contact us atFeedback&Contact
1. (WO2007000683) BIPOLAR TRANSISTOR AND METHOD OP MANUFACTURING THE SAME
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2007/000683 International Application No.: PCT/IB2006/051975
Publication Date: 04.01.2007 International Filing Date: 20.06.2006
IPC:
H01L 29/732 (2006.01) ,H01L 21/331 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
70
Bipolar devices
72
Transistor-type devices, i.e. able to continuously respond to applied control signals
73
Bipolar junction transistors
732
Vertical transistors
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
328
Multistep processes for the manufacture of devices of the bipolar type, e.g. diodes, transistors, thyristors
33
the devices comprising three or more electrodes
331
Transistors
Applicants:
NXP B.V. [NL/NL]; High Tech Campus 60 NL-5656 AG Eindhoven, NL (AllExceptUS)
HIJZEN, Erwin [NL/BE]; NL (UsOnly)
MELAI, Joost [NL/NL]; NL (UsOnly)
NEUILLY, Francois [FR/FR]; NL (UsOnly)
Inventors:
HIJZEN, Erwin; NL
MELAI, Joost; NL
NEUILLY, Francois; NL
Agent:
WHITE, Andrew; NXP Semiconductors Intellectual Property Department Cross Oak Lane Redhill, Surrey RH1 5HA, GB
Priority Data:
05105716.427.06.2005EP
Title (EN) BIPOLAR TRANSISTOR AND METHOD OP MANUFACTURING THE SAME
(FR) DISPOSITIF SEMI-CONDUCTEUR ET PROCEDE DE FABRICATION D'UN TEL DISPOSITIF
Abstract:
(EN) The invention relates to a semiconductor device with a substrate (11) and a semiconductor body (11) comprising a bipolar transistor with an emitter region (1), a base region (2) and a collector region (3) comprising a first, a second and a third connection conductor, which emitter region (1) comprises a mesa-shaped emitter connection region (IA) provided with spacers (4) and adjacent thereto a base connection region (2A) comprising a conductive region (2AA) of poly crystalline silicon. In a device (10) according to the invention, the base connection region (2A) comprises a further conducting region (2AB), which is positioned between the conductive region (2AA) of poly crystalline silicon and the base region (2) and which is made of a material with respect to which the conducting region (2AA) of polycrystalline silicon is selectively etchable. Such a device (10) is easy to manufacture by means of a method according to the invention and its bipolar transistor possesses excellent RF properties.
(FR) La présente invention concerne un dispositif semi-conducteur constitué d'un substrat (11) et d'un corps semi-conducteur (11) comprenant un transistor bipolaire avec une zone émettrice (1), une zone de base (2) et une zone collectrice (3) qui comprend un premier conducteur, un second conducteur et un troisième conducteur. La zone émettrice (1) comprend une zone de connexion émetteur à structure mesa (IA) pourvue d'intercalaires (4) et une zone de connexion de base (2A) adjacente à la zone de connexion émetteur, laquelle zone de connexion de base comprend une zone conductrice (2AA) constituée de silicium polycristallin. Dans un dispositif (10) décrit dans cette invention, la zone de connexion de base (2A) comprend une autre zone conductrice (2AB) qui est placée entre la zone conductrice (2AA) et la zone de base (2) et qui est constituée d'un matériau par rapport auquel la zone conductrice (2AA) peut être sélectivement gravée. Un tel dispositif (10) est facile à fabriquer selon le procédé décrit dans cette invention et le transistor bipolaire dont il est équipé présente d'excellentes propriétés RF.
front page image
Designated States: AE, AG, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BW, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LV, LY, MA, MD, MG, MK, MN, MW, MX, MZ, NA, NG, NI, NO, NZ, OM, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IS, IT, LT, LU, LV, MC, NL, PL, PT, RO, SE, SI, SK, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)
Also published as:
EP1900034JP2008544562US20090200577CN101208802