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Machine translation
1. (WO2006127465) INTEGRATION PROCESS FOR FABRICATING STRESSED TRANSISTOR STRUCTURE
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2006/127465    International Application No.:    PCT/US2006/019465
Publication Date: 30.11.2006 International Filing Date: 18.05.2006
IPC:
H01L 21/78 (2006.01), H01L 21/8238 (2006.01), H01L 29/49 (2006.01), H01L 21/28 (2006.01), H01L 21/336 (2006.01), C23C 16/34 (2006.01)
Applicants: APPLIED MATERIALS, INC. [US/US]; P.O. Box 450A, Santa Clara, California 95052 (US) (For All Designated States Except US).
BALSEANU, Mihaela [RO/US]; (US) (For US Only).
LEE, Jia [US/US]; (US) (For US Only).
SHEK, Mei-Yee [US/US]; (US) (For US Only).
AL-BAYATI, Amir [US/US]; (US) (For US Only).
XIA, Li-Qun [US/US]; (US) (For US Only).
M'SAAD, Hichem [TN/US]; (US) (For US Only)
Inventors: BALSEANU, Mihaela; (US).
LEE, Jia; (US).
SHEK, Mei-Yee; (US).
AL-BAYATI, Amir; (US).
XIA, Li-Qun; (US).
M'SAAD, Hichem; (US)
Agent: TOBIN, Kent, J.; Townsend and Townsend and Crew LLP, Two Embarcadero Center, 8th Floor, San Francisco, California 94301-1431 (US)
Priority Data:
60/685,365 26.05.2005 US
60/701,854 21.07.2005 US
11/398,436 05.04.2006 US
Title (EN) INTEGRATION PROCESS FOR FABRICATING STRESSED TRANSISTOR STRUCTURE
(FR) PROCESSUS D’INTÉGRATION POUR LA FABRICATION D'UNE STRUCTURE DE TRANSISTOR SOUMISE À DES TENSIONS
Abstract: front page image
(EN)A process flow integration scheme employs one or more techniques to control stress in a semiconductor device formed thereby. In accordance with one embodiment, cumulative stress contributed by RTP of a nitride spacer and polysilicon gate, and subsequent deposition of a high stress etch stop layer, enhance strain and improve device performance. Germanium may be deposited or implanted into the gate structure in order to facilitate stress control.
(FR)L’invention concerne un schéma d’intégration de flux du processus qui emploie une ou plusieurs techniques pour contrôler les tensions dans un dispositif semi-conducteur ainsi formé. Dans un mode de réalisation, la tension cumulative contribue par RTP d'une entretoise de nitrure et d'une gâchette en polysilicium, et par conséquent la déposition d’une couche d’arrêt d’écaillage par tensions élevée, permettent d’améliorer les tensions et augmentent les capacités du dispositif. Du germanium peut être déposé ou implanté dans la structure de gâchette afin de faciliter le contrôle des tensions.
Designated States: AE, AG, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BW, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LC, LK, LR, LS, LT, LU, LV, LY, MA, MD, MG, MK, MN, MW, MX, MZ, NA, NG, NI, NO, NZ, OM, PG, PH, PL, PT, RO, RU, SC, SD, SE, SG, SK, SL, SM, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, YU, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IS, IT, LT, LU, LV, MC, NL, PL, PT, RO, SE, SI, SK, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language: English (EN)
Filing Language: English (EN)