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1. WO2006121828 - ONE TIME PROGRAMMABLE MEMORY CELL

Publication Number WO/2006/121828
Publication Date 16.11.2006
International Application No. PCT/US2006/017355
International Filing Date 04.05.2006
IPC
H01L 23/62 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
58Structural electrical arrangements for semiconductor devices not otherwise provided for
62Protection against overcurrent or overload, e.g. fuses, shunts
CPC
G11C 17/16
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
17Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
14in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
16using electrically-fusible links
G11C 17/18
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
17Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
14in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
18Auxiliary circuits, e.g. for writing into memory
H01L 27/112
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
10including a plurality of individual components in a repetitive configuration
105including field-effect components
112Read-only memory structures ; [ROM] and multistep manufacturing processes therefor
H01L 27/11206
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
10including a plurality of individual components in a repetitive configuration
105including field-effect components
112Read-only memory structures ; [ROM] and multistep manufacturing processes therefor
11206Programmable ROM [PROM], e.g. memory cells comprising a transistor and a fuse or an antifuse
Applicants
  • ALPHA & OMEGA SEMICONDUCTOR, LTD. [--]/[US] (AllExceptUS)
Inventors
  • HU, Yongzhong
Agents
  • LIN, Bo-in
Priority Data
11/122,84805.05.2005US
Publication Language English (en)
Filing Language English (EN)
Designated States
Title
(EN) ONE TIME PROGRAMMABLE MEMORY CELL
(FR) CELLULE MEMOIRE A PROGRAMMATION UNIQUE
Abstract
(EN) This invention discloses a one-time programmable (OTP) memory cell. The OTP memory cell includes a dielectric layer disposed between two conductive polysilicon segments wherein the dielectric layer is ready to change from a non-conductive state to a conductive state through an induced voltage breakdown. In a preferred embodiment, one of the conductive polysilicon segments further includes an etch undercut configuration for conveniently inducing the voltage breakdown in the dielectric layer. In a preferred embodiment, the dielectric layer is further formed as sidewalk covering the edges and corners of a first polysilicon segments to conveniently induce a voltage breakdown in the dielectric layer by the edge and corner electrical field effects.
(FR) L'invention concerne une cellule mémoire à programmation unique (OTP). La cellule mémoire OTP comprend une couche diélectrique disposée entre deux segments de polysilicium conducteurs, ladite couche diélectrique pouvant passer d'un état non conducteur à un état conducteur par rigidité diélectrique induite. Dans un mode de réalisation préféré, un des segments de polysilicium conducteurs comprend en outre une configuration de cote de gravure permettant d'induire convenablement la rigidité diélectrique dans la couche diélectrique. Dans un mode de réalisation préféré, la couche diélectrique se présente sous forme de bordure recouvrant les bords et les coins d'un premier segment de polysilicium afin d'induire convenablement une rigidité diélectrique dans la couche diélectrique par les effets de champ électrique des bords et des coins.
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EP6752297This application is not viewable in PATENTSCOPE because the national phase entry has not been published yet or the national entry is issued from a country that does not share data with WIPO or there is a formatting issue or an unavailability of the application.
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