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1. WO2006115178 - OUTPUT DEVICE AND ELECTRONIC DEVICE PROVIDED WITH SAME

Publication Number WO/2006/115178
Publication Date 02.11.2006
International Application No. PCT/JP2006/308349
International Filing Date 20.04.2006
IPC
H02M 3/155 2006.01
HELECTRICITY
02GENERATION, CONVERSION, OR DISTRIBUTION OF ELECTRIC POWER
MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
3Conversion of dc power input into dc power output
02without intermediate conversion into ac
04by static converters
10using discharge tubes with control electrode or semiconductor devices with control electrode
145using devices of a triode or transistor type requiring continuous application of a control signal
155using semiconductor devices only
CPC
H02M 1/36
HELECTRICITY
02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
1Details of apparatus for conversion
36Means for starting or stopping converters
H02M 3/1588
HELECTRICITY
02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
3Conversion of dc power input into dc power output
02without intermediate conversion into ac
04by static converters
10using discharge tubes with control electrode or semiconductor devices with control electrode
145using devices of a triode or transistor type requiring continuous application of a control signal
155using semiconductor devices only
156with automatic control of output voltage or current, e.g. switching regulators
158including plural semiconductor devices as final control devices for a single load
1588comprising at least one synchronous rectifier element
H05B 45/10
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
BELECTRIC HEATING; ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR
45Circuit arrangements for operating light emitting diodes [LED]
10Controlling the intensity of the light
H05B 45/37
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
BELECTRIC HEATING; ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR
45Circuit arrangements for operating light emitting diodes [LED]
30Driver circuits
37Converter circuits
H05B 45/38
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
BELECTRIC HEATING; ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR
45Circuit arrangements for operating light emitting diodes [LED]
30Driver circuits
37Converter circuits
3725Switched mode power supply [SMPS]
38using boost topology
Y02B 20/30
YSECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
20Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
30Semiconductor lamps, e.g. solid state lamps [SSL] light emitting diodes [LED] or organic LED [OLED]
Applicants
  • ローム株式会社 ROHM CO., LTD. [JP]/[JP] (AllExceptUS)
  • 大参 昌貴 OMI, Masaki [JP]/[JP] (UsOnly)
Inventors
  • 大参 昌貴 OMI, Masaki
Agents
  • 佐野 静夫 SANO, Shizuo
Priority Data
2005-12343521.04.2005JP
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) OUTPUT DEVICE AND ELECTRONIC DEVICE PROVIDED WITH SAME
(FR) DISPOSITIF DE SORTIE ET DISPOSITIF ELECTRONIQUE FOURNI AVEC
(JA) 出力装置及びこれを備えた電子機器
Abstract
(EN)
A switching power supply IC (21) is provided by integrating a terminal (T2) whereupon an input voltage (Vin) is applied through an inductor (Lex); a terminal (T3) from which an output voltage (Vout) for a loading LED is extracted; a transistor (N1) connected between the terminal (T2) and a grounding end; a transistor (P1) connected between the terminal (T2) and the terminal (T3); a transistor (P2) connected between the terminal (T3) and a back gate of the transistor (P1); and a switching control section (CTRL) for performing switching control to each transistor. The switching control section (CTRL) performs supplementary switching control to the transistors (N1, P1) in a status where the transistor (P2) is constantly turned on while boost-driven, and controls the transistors (N1, P1, P2) to be in an off status when driving is stopped.
(FR)
La présente invention décrit un circuit intégré d'alimentation électrique par commutation (21) constitué en intégrant une borne (T2) sur laquelle une tension d'entrée (Vin) est appliquée par le biais d'un inducteur (Lex), une borne (T3) à partir de laquelle une tension de sortie (Vout) est extraite pour une LED de charge, un transistor (N1) connecté entre la borne (T2) et une extrémité à la terre, un transistor (P1) connecté entre la borne (T2) et la borne (T3), un transistor (P2) connecté entre la borne (T3) et une grille arrière du transistor (P1), enfin une section de contrôle de commutation (CTRL) pour réaliser le contrôle de commutation sur chaque transistor. La section de contrôle de commutation (CTRL) procède à un contrôle de commutation supplémentaire sur les transistors (N1, P1) dans une situation où le transistor (P2) est constamment allumé tout en étant poussé et contrôle les transistors (N1, P1, P2) pour qu'ils soient en situation d'arrêt lorsque l'attaque est arrêtée.
(JA)
 本発明に係るスイッチング電源IC21は、インダクタLexを介して入力電圧Vinが印加される端子T2と;負荷LEDへの出力電圧Voutが引き出される端子T3と;端子T2と接地端との間に接続されたトランジスタN1と;端子T2と端子T3との間に接続されたトランジスタP1と;端子T3とトランジスタP1のバックゲートとの間に接続されたトランジスタP2と;各トランジスタのスイッチング制御を行うスイッチング制御部CTRLと;を集積化して成り、スイッチング制御部CTRLは、昇圧駆動時には、トランジスタP2を常時オン状態とした上で、トランジスタN1、P1を相補的にスイッチング制御する一方、駆動停止時には、トランジスタN1、P1、P2をいずれもオフ状態になるように制御する構成とされている。
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