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1. (WO2006115166) ENCODING APPARATUS AND ENCODING METHOD

Pub. No.:    WO/2006/115166    International Application No.:    PCT/JP2006/308302
Publication Date: Nov 2, 2006 International Filing Date: Apr 20, 2006
IPC: H03M 13/19
Applicants: SONY CORPORATION
ソニー株式会社
YOKOKAWA, Takashi
横川 峰志
YAMAMOTO, Makiko
山本 真紀子
NAKANE, Misa
中根 美沙
Inventors: YOKOKAWA, Takashi
横川 峰志
YAMAMOTO, Makiko
山本 真紀子
NAKANE, Misa
中根 美沙
Title: ENCODING APPARATUS AND ENCODING METHOD
Abstract:
An encoding apparatus and an encoding method wherein the circuit scale of the encoding apparatus can be reduced without changing the operational rates of encoding of linear codes. An adder (13) adds up, for every six rows, the products of 6-bit information words (D13) supplied from a cyclic shift circuit (12) and the information parts of test matrix (H) corresponding to that information, and then supplies each sum (D15) to a RAM (14), which then stores each sum (D15). The RAM (14) reads 2-bit sums (D16) already stored therein and supplies them to an accumulator (16) via an interleaver (15) as sums (D17). The accumulator (16) accumulates the sums (D17) to develop, as a result of the accumulation, a sum (D18), which is then outputted via a selector (17) as a parity bit (p) of a code word (c). This invention can be applied to, for example, an apparatus of a broadcast station that transmits a satellite broadcast.