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1. WO2006094197 - POWER SAVING METHODS AND APPARATUS TO SELECTIVELY ENABLE COMPARATORS IN A CAM RENAMING REGISTER FILE BASED ON KNOWN PROCESSOR STATE

Publication Number WO/2006/094197
Publication Date 08.09.2006
International Application No. PCT/US2006/007608
International Filing Date 03.03.2006
IPC
G06F 1/32 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
1Details not covered by groups G06F3/-G06F13/82
26Power supply means, e.g. regulation thereof
32Means for saving power
CPC
G06F 1/3203
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
1Details not covered by groups G06F3/00G06F13/00 and G06F21/00
26Power supply means, e.g. regulation thereof
32Means for saving power
3203Power management, i.e. event-based initiation of power-saving mode
G06F 1/3275
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
1Details not covered by groups G06F3/00G06F13/00 and G06F21/00
26Power supply means, e.g. regulation thereof
32Means for saving power
3203Power management, i.e. event-based initiation of power-saving mode
3234Power saving characterised by the action undertaken
325Power saving in peripheral device
3275Power saving in memory, e.g. RAM, cache
G06F 9/30058
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
30003Arrangements for executing specific machine instructions
3005to perform operations for flow control
30058Conditional branch instructions
G06F 9/384
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
38Concurrent instruction execution, e.g. pipeline, look ahead
3836Instruction issuing, e.g. dynamic instruction scheduling, out of order instruction execution
3838Dependency mechanisms, e.g. register scoreboarding
384Register renaming
Y02D 10/00
YSECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
10Energy efficient computing, e.g. low power processors, power management or thermal management
Applicants
  • QUALCOMM INCORPORATED [US]/[US] (AllExceptUS)
  • BRIDGES, Jeffrey Todd [US]/[US] (UsOnly)
  • DIEFFENDERFER, James Norris [US]/[US] (UsOnly)
  • MCILVAINE, Michael Scott [US]/[US] (UsOnly)
  • SARTORIUS, Thomas Andrew [US]/[US] (UsOnly)
Inventors
  • BRIDGES, Jeffrey Todd
  • DIEFFENDERFER, James Norris
  • MCILVAINE, Michael Scott
  • SARTORIUS, Thomas Andrew
Agents
  • WADSWORTH, Philip R.
Priority Data
11/072,84903.03.2005US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) POWER SAVING METHODS AND APPARATUS TO SELECTIVELY ENABLE COMPARATORS IN A CAM RENAMING REGISTER FILE BASED ON KNOWN PROCESSOR STATE
(FR) PROCEDES ET APPAREILS DE GESTION DE LA CONSOMMATION D'ENERGIE PERMETTANT D'ACTIVER DE MANIERE SELECTIVE DES COMPARATEURS DANS UN FICHIER DE REGISTRE DE RENOMMAGE CAM EN FONCTION DE L'ETAT CONNU DU PROCESSEUR
Abstract
(EN)
A renaming register file complex for saving power is described. A mapping unit transforms an instruction register number (IRN) to a logical register number (LRN). The renaming register file maps an LRN to a physical register number (PRN), there being a greater number of physical registers than addressable by direct use of the IRN. The renaming register file uses a content addressable memory (CAM) to provide the mapping function. The renaming register file CAM further uses current processor state information to selectively enable tag comparators to minimize power in accessing registers. When a tag comparator is not enabled it remains in a low power state. A processor using a renaming register file with low power features is also described.
(FR)
L'invention concerne un complexe de fichier de registre de renommage permettant de gérer la consommation d'énergie. Une unité d'acheminement transforme un nombre de registre d'instruction (IRN) en un nombre de registre logique (LRN). Le fichier de registre de renommage achemine un LRN dans un nombre de registre physique (PRN), où il y a un nombre supérieur de registres physique adressables grâce à l'utilisation directe du IRN. Le fichier de registre de renommage utilise une mémoire adressable par contenu (CAM) pour fournir la fonction d'acheminement. Le fichier de registre de renommage CAM utilise également des informations d'état actuel du processeur, de manière à activer de façon sélective des comparateurs afin de minimiser l'énergie lors de l'accès aux registres. Quand un comparateur d'étiquettes n'est pas activé, il reste dans un état de faible puissance. L'invention concerne également un processeur utilisant un fichier de registre de renommage présentant des caractéristiques de faible puissance.
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