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1. WO2006093944 - SEMICONDUCTOR DEVICE TEST SYSTEM

Publication Number WO/2006/093944
Publication Date 08.09.2006
International Application No. PCT/US2006/007044
International Filing Date 28.02.2006
IPC
G01R 31/02 2006.01
GPHYSICS
01MEASURING; TESTING
RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
31Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
02Testing of electric apparatus, lines, or components for short-circuits, discontinuities, leakage, or incorrect line connection
G01R 13/00 2006.01
GPHYSICS
01MEASURING; TESTING
RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
13Arrangements for displaying electric variables or waveforms
CPC
G01R 31/2877
GPHYSICS
01MEASURING; TESTING
RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
31Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
28Testing of electronic circuits, e.g. by signal tracer
2851Testing of integrated circuits [IC]
2855Environmental, reliability or burn-in testing
2872related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation
2874related to temperature
2877related to cooling
Applicants
  • TEXAS INSTRUMENTS INCORPORATED [US]/[US] (AllExceptUS)
  • PENG, N. L. [--]/[--] (UsOnly)
  • HSU, S.P. [--]/[--] (UsOnly)
Inventors
  • PENG, N. L.
  • HSU, S.P.
Agents
  • FRANZ, Warren, L.
Priority Data
11/067,87128.02.2005US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) SEMICONDUCTOR DEVICE TEST SYSTEM
(FR) SYSTEME D'ESSAI DE DISPOSITIF A SEMI-CONDUCTEURS
Abstract
(EN)
An apparatus for mitigating condensation formation on a device interface board during low-temperature semiconductor device testing includes a nozzle (10). The nozzle includes an input orifice (32) for receiving gas from a gas source and at least one output orifice (42) for discharging gas from the nozzle against a surface of the device interface board. The area of the at least one output orifice is substantially greater than the area of input orifice.
(FR)
L'invention concerne un appareil permettant d'atténuer la formation de condensation sur une carte d'interface de dispositif pendant un essai de dispositif à semi-conducteurs à basse température. Cet appareil comprend une buse (10) qui possède un orifice d'entrée (32) permettant de recevoir un gaz en provenance d'une source de gaz et au moins un orifice de sortie (42) permettant d'évacuer du gaz en provenance de la buse contre une surface de la carte d'interface du dispositif. La surface du ou des orifices de sortie est sensiblement supérieure à celle de l'orifice d'entrée.
Also published as
EP6736374
Latest bibliographic data on file with the International Bureau