WIPO logo
Mobile | Deutsch | Español | Français | 日本語 | 한국어 | Português | Русский | 中文 | العربية |
PATENTSCOPE

Search International and National Patent Collections
World Intellectual Property Organization
Search
 
Browse
 
Translate
 
Options
 
News
 
Login
 
Help
 
Machine translation
1. (WO2006091510) PLASMA PRE-TREATING SURFACES FOR ATOMIC LAYER DEPOSITION
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2006/091510    International Application No.:    PCT/US2006/005868
Publication Date: 31.08.2006 International Filing Date: 21.02.2006
IPC:
H01L 21/768 (2006.01), H01L 21/285 (2006.01)
Applicants: ASM AMERICA, INC. [US/US]; 3440 East University Drive, Phoenix, Arizona 85034-7200 (US) (For All Designated States Except US).
KUMAR, Davendra [US/US]; (US) (For US Only).
GOUNDAR, Kamal, Kishore [FJ/JP]; (JP) (For US Only).
KEMELING, Nathanael, R.C. [NL/JP]; (JP) (For US Only).
FUKUDA, Hideaki [JP/JP]; (JP) (For US Only).
SPREY, Hessel [NL/BE]; (BE) (For US Only).
STOKHOF, Maarten [NL/BE]; (BE) (For US Only)
Inventors: KUMAR, Davendra; (US).
GOUNDAR, Kamal, Kishore; (JP).
KEMELING, Nathanael, R.C.; (JP).
FUKUDA, Hideaki; (JP).
SPREY, Hessel; (BE).
STOKHOF, Maarten; (BE)
Agent: DELANEY, Karoline, A.; Knobbe, Martens, Olson & Bear, Llp, 2040 Main Street, 14th Floor, Irvine, California 92614 (US)
Priority Data:
60/655,610 22.02.2005 US
Title (EN) PLASMA PRE-TREATING SURFACES FOR ATOMIC LAYER DEPOSITION
(FR) PRE-TRAITEMENT DE SURFACES AU PLASMA POUR LE DEPOT DE COUCHE ATOMIQUE
Abstract: front page image
(EN)Method and structures are provided for conformal lining of dual damascene structures in integrated circuits. Preferred embodiments are directed to providing conformal lining over openings formed in porous materials. Trenches are formed (100) in insulating layers. The layers are then adequately treated with a particular plasma process (101). Following this plasma treatment a self-limiting, self-saturating atomic layer deposition (ALD) reaction (115) can occur without significantly filling the pores forming improved interconnects.
(FR)Procédé et structures pour l'application de revêtement conforme sur des structures à double damasquinage dans des circuits intégrés. En modes de réalisation préférés, ce revêtement est appliqué sur des ouvertures formées dans des matériaux poreux. On établit des tranchées (100) dans des couches isolantes, et ces couches sont ensuite traitées de façon appropriée selon un procédé au plasma spécifique (101), puis on peut conduire une réaction de dépôt de couche atomique à auto-limitation et auto-saturation (115) sans remplissage significatif des pores qui forment les interconnexions améliorées.
Designated States: AE, AG, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BW, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LC, LK, LR, LS, LT, LU, LV, LY, MA, MD, MG, MK, MN, MW, MX, MZ, NA, NG, NI, NO, NZ, OM, PG, PH, PL, PT, RO, RU, SC, SD, SE, SG, SK, SL, SM, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, YU, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IS, IT, LT, LU, LV, MC, NL, PL, PT, RO, SE, SI, SK, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language: English (EN)
Filing Language: English (EN)