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Machine translation
1. (WO2006085559) STRUCTURE FOR HOLDING FINE STRUCTURE, SEMICONDUCTOR DEVICE, TFT DRIVING CIRCUIT, PANEL, DISPLAY, SENSOR AND THEIR MANUFACTURING METHODS
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2006/085559    International Application No.:    PCT/JP2006/302180
Publication Date: 17.08.2006 International Filing Date: 08.02.2006
IPC:
B82B 1/00 (2006.01), B82B 3/00 (2006.01), G09F 9/30 (2006.01), H01L 21/336 (2006.01), H01L 29/06 (2006.01), H01L 29/786 (2006.01)
Applicants: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. [JP/JP]; 1006, Oaza Kadoma, Kadoma-shi, Osaka 5718501 (JP) (For All Designated States Except US).
KAWASHIMA, Takahiro; (For US Only).
SAITOH, Tohru; (For US Only).
MINO, Norihisa; (For US Only)
Inventors: KAWASHIMA, Takahiro; .
SAITOH, Tohru; .
MINO, Norihisa;
Agent: MAEDA, Hiroshi; Osaka-Marubeni Bldg., 5-7, Hommachi 2-chome, Chuo-ku, Osaka-shi, Osaka 5410053 (JP)
Priority Data:
2005-033962 10.02.2005 JP
Title (EN) STRUCTURE FOR HOLDING FINE STRUCTURE, SEMICONDUCTOR DEVICE, TFT DRIVING CIRCUIT, PANEL, DISPLAY, SENSOR AND THEIR MANUFACTURING METHODS
(FR) STRUCTURE DE MAINTIEN DE FINE STRUCTURE, DISPOSITIF SEMI-CONDUCTEUR, CIRCUIT D’ENTRAÎNEMENT TFT, PANNEAU, AFFICHAGE, CAPTEUR ET LEURS PROCÉDÉS DE FABRICATION
(JA) 微細構造体を保持するための構造体、半導体装置、TFT駆動回路、パネル、ディスプレイ、センサおよびこれらの製造方法
Abstract: front page image
(EN)Disclosed is a method for arranging fine structures such as carbon nanotubes and semiconductor nanowires on a substrate. Also disclosed is a substrate having fine structures arranged thereon by such a method. Specifically disclosed is a method for arranging fine structures on a substrate which comprises a step for forming a groove (2) in a substrate (1); a step for dropping a solution (6), wherein fine structures (3) are dispersed, in the groove; and a step for arranging the fine structures in the groove in a self-organizing manner by evaporating the solution. A substrate on which fine structures are arranged by such a method can be used for field effect transistors and sensors.
(FR)L’invention concerne un procédé de disposition de fines structures comme des nanotubes de carbone et des nanofils à semi-conducteur sur un substrat. Elle concerne également un substrat ayant de fines structures disposées sur celui-ci grâce à un tel procédé. Elle divulgue spécifiquement un procédé de disposition de fines structures sur un substrat, comprenant une phase de formation d’une rainure (2) dans un substrat (1) ; une phase d’application d’une solution (6), où l’on disperse de fines structures (3) dans la rainure ; et une phase de disposition des fines structures dans la rainure par organisation automatique en laissant évaporer la solution. On peut utiliser un substrat sur lequel de fines structures sont disposées au moyen d’un tel procédé pour des transistors à effet de champ et des capteurs.
(JA)not available
Designated States: AE, AG, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BW, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LC, LK, LR, LS, LT, LU, LV, LY, MA, MD, MG, MK, MN, MW, MX, MZ, NA, NG, NI, NO, NZ, OM, PG, PH, PL, PT, RO, RU, SC, SD, SE, SG, SK, SL, SM, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, YU, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IS, IT, LT, LU, LV, MC, NL, PL, PT, RO, SE, SI, SK, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)