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1. WO2006051945 - DIGITAL TELEVISION RECEIVER CIRCUIT MODULE

Publication Number WO/2006/051945
Publication Date 18.05.2006
International Application No. PCT/JP2005/020846
International Filing Date 14.11.2005
IPC
H04B 1/16 2006.1
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
BTRANSMISSION
1Details of transmission systems, not covered by a single one of groups H04B3/-H04B13/123; Details of transmission systems not characterised by the medium used for transmission
06Receivers
16Circuits
H04N 5/00 2011.1
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
NPICTORIAL COMMUNICATION, e.g. TELEVISION
5Details of television systems
H04N 5/44 2011.1
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
NPICTORIAL COMMUNICATION, e.g. TELEVISION
5Details of television systems
44Receiver circuitry
H05K 1/14 2006.1
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
02Details
14Structural association of two or more printed circuits
CPC
H01L 2224/16145
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
15Structure, shape, material or disposition of the bump connectors after the connecting process
16of an individual bump connector
161Disposition
16135the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
16145the bodies being stacked
H01L 2224/16225
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
15Structure, shape, material or disposition of the bump connectors after the connecting process
16of an individual bump connector
161Disposition
16151the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
16221the body and the item being stacked
16225the item being non-metallic, e.g. insulating substrate with or without metallisation
H01L 2924/15311
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2924Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
15Details of package parts other than the semiconductor or other solid state devices to be connected
151Die mounting substrate
153Connection portion
1531the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
15311being a ball array, e.g. BGA
H01L 2924/15331
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2924Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
15Details of package parts other than the semiconductor or other solid state devices to be connected
151Die mounting substrate
153Connection portion
1532the connection portion being formed on the die mounting surface of the substrate
1533the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate
15331being a ball array, e.g. BGA
H04N 21/235
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
NPICTORIAL COMMUNICATION, e.g. TELEVISION
21Selective content distribution, e.g. interactive television or video on demand [VOD]
20Servers specifically adapted for the distribution of content, e.g. VOD servers; Operations thereof
23Processing of content or additional data; Elementary server operations; Server middleware
235Processing of additional data, e.g. scrambling of additional data or processing content descriptors
H04N 21/4181
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
NPICTORIAL COMMUNICATION, e.g. TELEVISION
21Selective content distribution, e.g. interactive television or video on demand [VOD]
40Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
41Structure of client; Structure of client peripherals
418External card to be used in combination with the client device, e.g. for conditional access
4181for conditional access
Applicants
  • 松下電器産業株式会社 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. [JP]/[JP] (AllExceptUS)
  • 高鳥 正博 TAKATORI, Masahiro (UsOnly)
Inventors
  • 高鳥 正博 TAKATORI, Masahiro
Agents
  • 河宮 治 KAWAMIYA, Osamu
Priority Data
2004-32874412.11.2004JP
Publication Language Japanese (ja)
Filing Language Japanese (JA)
Designated States
Title
(EN) DIGITAL TELEVISION RECEIVER CIRCUIT MODULE
(FR) MODULE DE CIRCUIT D'UN RECEPTEUR TELEVISE NUMERIQUE
(JA) デジタルテレビジョン受信機用回路モジュール
Abstract
(EN) A digital television receiver circuit module (1) is formed by superimposing a decoder layer board (507) including a decoder LSI (2), which incorporates a CPU and a decoder, and also including a CA interface circuit (3); a demodulating function layer board (620-1) including a demodulator (12); and an expanding function layer board (401) including a communication controller (404). Either one of the demodulating function layer board (620-1) and expanding function layer board (401) can be selectively superimposed on the decoder layer board (507) in accordance with the type of the broadcast system of a digital television signal or the type of CA module.
(FR) La présente invention concerne un module de circuit d'un récepteur télévisé numérique (1) qui est formé en superposant une plaque avec couche de décodeur (507) comprenant un LSI de décodeur (2), qui comprend une unité centrale et un décodeur, ainsi qu'un circuit d'interface CA (3), une plaque avec couche de démodulation (620-1) comprenant un démodulateur (12) et une plaque avec couche d'extension (401) comprenant un contrôleur de communication (404). L'une ou l'autre des plaques avec couche de démodulation (620-1) et des plaques avec couche d'expansion (401) peuvent être superposées de manière sélective sur la plaque avec couche de décodeur (507) conformément au type du système de diffusion d'un signal télévisé numérique du type du module CA.
(JA)  デジタルテレビジョン受信機用回路モジュール(1)は、CPUとデコーダを含むデコーダLSI(2)とCAインターフェース回路(3)を含むデコーダ層基板(507)と、復調器(12)含む復調機能層基板(620-1)と、通信コントローラ(404)を含む拡張機能層基板(401)とを積層することにより形成される。デジタルテレビジョン信号の放送方式又はCAモジュールの種類に対応して、復調機能層基板(620-1)と拡張機能層基板(401)をデコーダ層基板(507)に選択可能に積層できる。
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