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1. WO2006044726 - SYSTEM PACKET INTERFACE PACKET EXCHANGE FOR QUEUE CONCATENATION AND LOGICAL IDENTIFICATION

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Publication Number WO/2006/044726
Publication Date 27.04.2006
International Application No. PCT/US2005/037134
International Filing Date 15.10.2005
IPC
H04L 12/26 2006.01
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
12Data switching networks
02Details
26Monitoring arrangements; Testing arrangements
H04L 12/56 2006.01
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
12Data switching networks
54Store-and-forward switching systems
56Packet switching systems
CPC
H04L 47/10
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
47Traffic regulation in packet switching networks
10Flow control or congestion control
H04L 47/12
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
47Traffic regulation in packet switching networks
10Flow control or congestion control
12Congestion avoidance or recovery
H04L 47/17
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
47Traffic regulation in packet switching networks
10Flow control or congestion control
17Hop by hop
H04L 47/26
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
47Traffic regulation in packet switching networks
10Flow control or congestion control
26Explicit feedback to the source, e.g. choke packet
H04L 47/29
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
47Traffic regulation in packet switching networks
10Flow control or congestion control
29Using a combination of thresholds
H04L 47/30
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
47Traffic regulation in packet switching networks
10Flow control or congestion control
30using information about buffer occupancy at either end or transit nodes
Applicants
  • INTEGRATED DEVICE TECHNOLOGY, INC. [US]/[US] (AllExceptUS)
Inventors
  • WANG, Sibing
  • ZHANG, Xiaoqian
  • GAN, Zhonghai
  • ZHAI, Shubing
Agents
  • HEIMLICH, Alan
Priority Data
11/250,87314.10.2005US
60/619,23415.10.2004US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) SYSTEM PACKET INTERFACE PACKET EXCHANGE FOR QUEUE CONCATENATION AND LOGICAL IDENTIFICATION
(FR) PROCEDE ET APPAREIL D'INTERFACE GENERIQUE, DE TRAVERSEE DE PAQUETS, DE SURRESERVATION, DE CONCATENATION DE FILE D'ATTENTE, ET DE PRIORITE D'IDENTIFICATION LOGIQUE POUR UN DISPOSITIF D'INTERFACE DE SYSTEME PAR PAQUETS
front page image
Abstract
(EN)
A System packet interface (SP1) packet exchange apparatus comprising one or more System packet interfaces (SPIs) each SPI having an ingress and egress port capable of coupling to one or more devices and receiving and sending data; and one or more buffers coupled to handle said receiving and sending data wherein said one or more buffers are created from a segmented memory (figure 18).
(FR)
L'invention concerne un procédé et un appareil d'interface générique, de traversée de paquets, de surréservation, de concaténation de file d'attente, et de priorité d'identification logique pour un dispositif d'interface de système par paquets.
Also published as
US20060083185
CN101095308
US7636367
US7505468
US08036216
US08064472
Latest bibliographic data on file with the International Bureau
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