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1. WO2006036402 - SLIDING CASCODE CIRCUIT

Publication Number WO/2006/036402
Publication Date 06.04.2006
International Application No. PCT/US2005/030102
International Filing Date 22.08.2005
IPC
H03F 1/22 2006.01
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
FAMPLIFIERS
1Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
08Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements
22by use of cascode coupling, i.e. earthed cathode or emitter stage followed by earthed grid or base stage respectively
CPC
H03F 1/223
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
FAMPLIFIERS
1Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
08Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements
22by use of cascode coupling, i.e. earthed cathode or emitter stage followed by earthed grid or base stage respectively
223with MOSFET's
Applicants
  • BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION, INC. [US]/[US] (AllExceptUS)
  • HAIRSTON, Allen, W. [US]/[US] (UsOnly)
Inventors
  • HAIRSTON, Allen, W.
Agents
  • LONG, Daniel
Priority Data
10/929,60430.08.2004US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) SLIDING CASCODE CIRCUIT
(FR) CIRCUIT CASCODE COULISSANT
Abstract
(EN)
Described techniques extend (e.g., by a factor of 2) the dynamic range of voltage swing for amplifiers and other integrated circuits (e.g., buffers) that are fabricated using lower voltage rated semiconductor processes. Such processes include, for instance, thin gate oxide MOS, and other semiconductor processes that provide desirable features that are typically not associated with high voltage processes, such as increased radiation hardness, higher speed logic, and compactness. Thus, relatively large dynamic range is enabled for integrated circuits fabricated using feature-rich lower voltage rated semiconductor processes.
(FR)
Les techniques de l'invention permettent d'étendre la portée dynamique d'excursion de tension (par exemple par un facteur 2) d'amplificateurs et d'autres circuits intégrés (par exemple des tampons) qui sont fabriqués via des processus de semi-conducteur qualifiés basse tension. Ces processus comprennent, par exemple, un MOS oxyde grille mince et d'autres processus de semi-conducteur fournissant des caractéristiques recherchées qui ne sont habituellement pas associées à des processus haute tension, telles qu'une résistance améliorée au rayonnement, une logique plus rapide et une compacité. Ainsi, on obtient une portée dynamique relativement grande pour des circuits intégrés fabriqués au moyen de processus de semi-conducteur qualifié basse tension aux caractéristiques multiples.
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