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1. WO2006019099 - INSULATION SUBSTRATE, POWER MODULE SUBSTRATE, MANUFACTURING METHOD THEREOF, AND POWER MODULE USING THE SAME

Publication Number WO/2006/019099
Publication Date 23.02.2006
International Application No. PCT/JP2005/014958
International Filing Date 16.08.2005
IPC
H01L 23/12 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
12Mountings, e.g. non-detachable insulating substrates
CPC
H01L 21/4846
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
4814Conductive parts
4846Leads on or in insulating or insulated substrates, e.g. metallisation
H01L 2224/32225
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
31Structure, shape, material or disposition of the layer connectors after the connecting process
32of an individual layer connector
321Disposition
32151the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
32221the body and the item being stacked
32225the item being non-metallic, e.g. insulating substrate with or without metallisation
H01L 2224/83801
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
83using a layer connector
838Bonding techniques
83801Soldering or alloying
H01L 2224/8382
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
83using a layer connector
838Bonding techniques
83801Soldering or alloying
8382Diffusion bonding
H01L 23/3735
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
34Arrangements for cooling, heating, ventilating or temperature compensation ; ; Temperature sensing arrangements
36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
373Cooling facilitated by selection of materials for the device ; or materials for thermal expansion adaptation, e.g. carbon
3735Laminates or multilayers, e.g. direct bond copper ceramic substrates
H01L 24/32
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
24Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
31Structure, shape, material or disposition of the layer connectors after the connecting process
32of an individual layer connector
Applicants
  • 三菱マテリアル株式会社 MITSUBISHI MATERIALS CORPORATION [JP]/[JP] (AllExceptUS)
  • 根岸 健 NEGISHI, Takeshi [JP]/[JP] (UsOnly)
  • 長瀬 敏之 NAGASE, Toshiyuki [JP]/[JP] (UsOnly)
Inventors
  • 根岸 健 NEGISHI, Takeshi
  • 長瀬 敏之 NAGASE, Toshiyuki
Priority Data
2004-23730417.08.2004JP
2005-21008620.07.2005JP
Publication Language Japanese (ja)
Filing Language Japanese (JA)
Designated States
Title
(EN) INSULATION SUBSTRATE, POWER MODULE SUBSTRATE, MANUFACTURING METHOD THEREOF, AND POWER MODULE USING THE SAME
(FR) SUBSTRAT ISOLANT, SUBSTRAT DE MODULE D’ALIMENTATION, PROCEDE DE FABRICATION DE CELUI-CI ET MODULE D’ALIMENTATION UTILISANT LEDIT SUBSTRAT
(JA) 絶縁基板、パワーモジュール用基板並びにそれらの製造方法およびそれらを用いたパワーモジュール
Abstract
(EN) There are provided an insulation substrate, an insulation substrate manufacturing method, a power module substrate, and a power module which are appropriately used for realizing highly-efficient manufacturing of a power module substrate and reduction of the line thickness in a conductive pattern and realizing a large current and a high voltage of a power module. A wax material foil (15a) is temporality fixed on a surface of a ceramics substrate (12) by a surface tension of a volatile organic medium. A conductive pattern member (13b) punched from a base material (13a) is temporarily fixed on a surface of the wax material foil (15a) by the surface tension. These are heated so as to volatilize the volatile organic medium and pressure is applied to the conductive pattern member (13a) in its thickness direction. The wax material foil (15a) is melted to join the conductive pattern member (13b) with the surface of the ceramics substrate (12). The rising surface of the external surface of the conductor constituting the conductive pattern substantially rises vertically with respect to the direction along the surface of the ceramics substrate. The substantially entire surface of the rise surface is covered by wax material.
(FR) L’invention porte sur un substrat isolant, un procédé de fabrication de substrat isolant, un substrat de module d’alimentation et un module d’alimentation qui s’utilisent comme il convient pour réaliser une fabrication très efficace d’un substrat de module d’alimentation et pour réduire l’épaisseur de ligne dans une grille conductrice et obtenir un courant important et une haute tension de module d’alimentation. Un film de matériau de cire (15a) est fixé temporairement sur une surface de substrat céramique (12) par une tension superficielle d’un support organique volatil. Un élément de grille conductrice (13b) matricé à partir d’un matériau de base (13a) est fixé temporairement sur une surface du film de matériau de cire (15a) par la tension superficielle. Ces éléments sont chauffés pour volatiliser le support organique volatil et une pression est appliquée à l’élément de grille conductrice (13b) dans le sens de son épaisseur. Le film de matériau de cire (15a) est fondu pour joindre l’élément de grille conductrice (13b) à la surface du substrat céramique (12). La surface surélevée de la surface externe du conducteur constituant la grille conductrice s’élève sensiblement à la verticale par rapport au sens longeant la surface du substrat céramique. Pratiquement toute la surface de la partie surélevée est recouverte de matériau de cire.
(JA) not available
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