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Machine translation
1. (WO2006016312) FREQUENCY DIVIDER
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2006/016312    International Application No.:    PCT/IB2005/052534
Publication Date: 16.02.2006 International Filing Date: 27.07.2005
IPC:
H03K 23/54 (2006.01), H03K 3/356 (2006.01)
Applicants: KONINKLIJKE PHILIPS ELECTRONICS N.V. [NL/NL]; Groenewoudseweg 1, NL-5621 BA Eindhoven (NL) (For All Designated States Except US).
ACAR, Mustafa [TR/NL]; (NL) (For US Only).
LEENAERTS, Dominicus, M., W. [NL/NL]; (NL) (For US Only).
NAUTA, Bram [NL/NL]; (NL) (For US Only)
Inventors: ACAR, Mustafa; (NL).
LEENAERTS, Dominicus, M., W.; (NL).
NAUTA, Bram; (NL)
Agent: PENNINGS, Johannes; NXP Semiconductors, IP Department, High Tech Campus 60, NL-5656 AG Eindhoven (NL)
Priority Data:
04103804.3 06.08.2004 EP
Title (EN) FREQUENCY DIVIDER
(FR) DIVISEUR DE FREQUENCE
Abstract: front page image
(EN)A frequency divider comprising, a first latch circuit (10) and a second latch circuit (10'), the second latch circuit (10') being crossed-coupled to the first latch circuit (10). Each latch (10; 10') comprises a respective sense amplifier coupled to a respective latch (11). The sense amplifiers comprise a first clock input for receiving a first clock signal (f, ­f) and 5 respective complementary first clock signal having a first frequency. The latches (11) comprise a second clock input (2f; 2f) for receiving a second clock signal and respective complementary second clock signal having a second frequency, the second frequency being substantially double the first frequency.
(FR)L'invention concerne un diviseur de fréquence comprenant un premier circuit (10) de verrouillage et un second circuit (10') de verrouillage interconnecté au premier circuit (10) de verrouillage. Chaque verrou (10, 10') comprend un amplificateur de détection correspondant, couplé à chaque verrou (11). Lesdits amplificateurs comprennent une première entrée d'horloge, destinée à recevoir un premier signal d'horloge (f, -f) et un signal d'horloge complémentaire présentant une première fréquence. Les verrous (11) comprennent une seconde entrée d'horloge (2f, -2f) destinée à recevoir un second signal d'horloge et un second signal d'horloge complémentaire présentant une seconde fréquence, la seconde fréquence étant sensiblement le double de la première fréquence.
Designated States: AE, AG, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BW, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KP, KR, KZ, LC, LK, LR, LS, LT, LU, LV, MA, MD, MG, MK, MN, MW, MX, MZ, NA, NG, NI, NO, NZ, OM, PG, PH, PL, PT, RO, RU, SC, SD, SE, SG, SK, SL, SM, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, YU, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IS, IT, LT, LU, LV, MC, NL, PL, PT, RO, SE, SI, SK, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language: English (EN)
Filing Language: English (EN)