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1. (WO2005088692) SUBSTRATE PROCESSING APPARATUS AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2005/088692 International Application No.: PCT/JP2005/004299
Publication Date: 22.09.2005 International Filing Date: 11.03.2005
IPC:
C23C 16/455 (2006.01) ,H01L 21/31 (2006.01)
C CHEMISTRY; METALLURGY
23
COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
C
COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
16
Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes
44
characterised by the method of coating
455
characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31
to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
Applicants:
株式会社日立国際電気 HITACHI KOKUSAI ELECTRIC INC. [JP/JP]; 〒1648511 東京都中野区東中野三丁目14番20号 Tokyo 3-14-20, Higashi-Nakano, Nakano-ku, Tokyo 1648511, JP (AllExceptUS)
境 正憲 SAKAI, Masanori [JP/JP]; JP (UsOnly)
吉村 智浩 YOSHIMURA, Tomohiro [JP/JP]; JP (UsOnly)
Inventors:
境 正憲 SAKAI, Masanori; JP
吉村 智浩 YOSHIMURA, Tomohiro; JP
Agent:
宮本 治彦 MIYAMOTO, Haruhiko; 〒2280803 神奈川県相模原市相模大野三丁目19番13号 アーベイン相模ビル602号 Kanagawa Urbane Sagami Bldg. 602, 19-13, Sagami-ono 3-chome, Sagamihara-shi, Kanagawa 2280803, JP
Priority Data:
2004-07013612.03.2004JP
Title (EN) SUBSTRATE PROCESSING APPARATUS AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
(FR) APPAREIL DE TRAITEMENT DE SUBSTRAT ET PROCÉDÉ DE FABRICATION DE DISPOSITIF SEMI-CONDUCTEUR
(JA) 基板処理装置および半導体装置の製造方法
Abstract:
(EN) A substrate processing apparatus is provided with a reaction chamber (201), a substrate rotating mechanism (267) for rotating a wafer (200), and a gas supplying part for supplying the wafer (200) with gas. At least two types of gases A and B are alternately supplied a plurality of times, and a desired film is formed on the wafer (200). A control part (321) is provided to control a rotation cycle of the wafer (200) so as not to synchronize a gas supply cycle, which is prescribed by a period between a time when the gas A is flowed and a time when the gas A is flowed subsequently, with the rotation cycle of the wafer (200), at least for a time the alternate gas supply is performed prescribed times. The thickness uniformity of a film formed by an ALD method within the substrate plane is prevented from deteriorating.
(FR) Il est prévu un appareil de traitement de substrat avec une chambre de réaction (201), un mécanisme de rotation de substrat (267) pour faire tourner une pastille (200), et une partie d’injection de gaz pour alimenter la pastille (200) en gaz. Au moins deux types de gaz A et B sont injectés en alternance une pluralité de fois, et un film désiré se forme sur la pastille (200). Une partie de commande (321) est prévue pour commander un cycle de rotation de la pastille (200) pour ne pas synchroniser de cycle d’arrivée de gaz, qui est prescrit par une période entre le moment auquel le gaz A s’écoule et le moment auquel le gaz A s’écoule ensuite, avec le cycle de rotation de la pastille (200), au moins au moment pendant que l’autre arrivée de gaz est sollicitée pendant les moments prescrits. L’uniformité d’épaisseur d’un film formé par un procédé ALD dans le plan du substrat ne peut pas se détériorer.
(JA) not available
front page image
Designated States: AE, AG, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BW, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, HR, HU, ID, IL, IN, IS, JP, KE, KG, KP, KR, KZ, LC, LK, LR, LS, LT, LU, LV, MA, MD, MG, MK, MN, MW, MX, MZ, NA, NI, NO, NZ, OM, PG, PH, PL, PT, RO, RU, SC, SD, SE, SG, SK, SL, SM, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, YU, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IS, IT, LT, LU, MC, NL, PL, PT, RO, SE, SI, SK, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)
Also published as:
KR1020060095955JPWO2005088692JP2009239304US20080153309JP4361932US20110212626
CN1842899US20150050818