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1. (WO2005067051) SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2005/067051 International Application No.: PCT/JP2003/016986
Publication Date: 21.07.2005 International Filing Date: 26.12.2003
IPC:
H01L 27/10 (2006.01) ,H01L 27/105 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04
the substrate being a semiconductor body
10
including a plurality of individual components in a repetitive configuration
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04
the substrate being a semiconductor body
10
including a plurality of individual components in a repetitive configuration
105
including field-effect components
Applicants: IZUMI, Kazutoshi[JP/JP]; JP (UsOnly)
FUJITSU LIMITED[JP/JP]; 1-1, Kamikodanaka 4-chome, Nakahara-ku Kawasaki-shi, Kanagawa 211-8588, JP (AllExceptUS)
Inventors: IZUMI, Kazutoshi; JP
Agent: ITOH, Tadahiko; 32nd Floor Yebisu Garden Place Tower 20-3, Ebisu 4-chome Shibuya-ku, Tokyo 150-6032, JP
Priority Data:
Title (EN) SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
(FR) DISPOSITIF A SEMICONDUCTEUR ET PROCEDE DE FABRICATION
(JA) 半導体装置、半導体装置の製造方法
Abstract:
(EN) A semiconductor device having a high-quality ferroelectric capacitor wherein deterioration of the ferroelectric capacitor is prevented by preventing diffusion of hydrogen or H2O is disclosed. The semiconductor device comprising a ferroelectric capacitor formed on a substrate and a wiring structure formed on the ferroelectric capacitor is characterized in that the wiring structure comprises an interlayer insulating layer and a Cu wiring portion formed in the interlayer insulating layer and that an etching stopper layer including a hydrogen diffusion-preventing layer is so formed as to face the interlayer insulating layer.
(FR) L'invention concerne un dispositif à semiconducteur à condensateur ferroélectrique de haute qualité. La détérioration de ce condensateur est évitée par prévention de la diffusion d'hydrogène ou d'eau. Le dispositif comprend un condensateur ferroélectrique établi sur un substrat et une structure de câblage établie sur le condensateur : ladite structure comprend une couche d'isolation intercouche et une partie de câblage en Cu établie dans cette couche d'isolation, et par ailleurs une couche d'arrêt d'attaque à couche barrière contre la diffusion d'hydrogène est établie face à la couche d'isolation.
(JA) 本発明では、水素またはH2Oの拡散を防止することで強誘電体キャパシタの劣化を防止し、高品質の強誘電体キャパシタを有する半導体装置を提供することを課題とする。そのため、本発明では、基板上に形成された強誘電体キャパシタと、前記強誘電体キャパシタ上に形成された配線構造とを有する半導体装置であって、前記配線構造は、層間絶縁層と当該層間絶縁層中に形成されたCu配線部を含み、前記層間絶縁層に面するように、水素拡散防止層を含むエッチングストッパー層が形成されていることを特徴とする半導体装置を用いた。
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Designated States: CN, JP, KR, US
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)