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Machine translation
1. (WO2005067043) MONOLITHICALLY INTEGRATED CIRCUIT FOR RADIO FREQUENCY APPLICATIONS
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2005/067043    International Application No.:    PCT/SE2004/001973
Publication Date: 21.07.2005 International Filing Date: 22.12.2004
IPC:
H01L 21/02 (2006.01), H01L 27/06 (2006.01), H01L 27/08 (2006.01)
Applicants: INFINEON TECHNOLOGIES AG [DE/DE]; St.-Martin-Str. 53, DE-81669 MÜNCHEN (DE) (For All Designated States Except US).
ARNBORG, Torkel [SE/SE]; (SE) (For US Only)
Inventors: ARNBORG, Torkel; (SE)
Agent: FRITZON, Rolf; KRANSELL & WENNBORG AB, Box 27834, S-115 93 STOCKHOLM (SE)
Priority Data:
0400035-2 09.01.2004 SE
Title (EN) MONOLITHICALLY INTEGRATED CIRCUIT FOR RADIO FREQUENCY APPLICATIONS
(FR) CIRCUIT INTEGRE MONOLITHIQUE POUR APPLICATIONS RADIOFREQUENCE
Abstract: front page image
(EN)A monolithically integrated circuit, particularly an integrated circuit for radio frequency power applications, comprises a transistor (11; 51), preferably a power LDMOS transistor, and a spiral inductor (12; 26; 41; 52, 53), preferably an RF blocking inductor. The spiral inductor is arranged on top of the transistor, whereby an electromagnetic coupling between said spiral inductor and said transistor is not typically possible to avoid. However, the transistor has a finger type layout (13a-k, 14a-f) to prevent any significant eddy currents caused by the electromagnetic coupling from occurring. The chip area needed for the circuit is strongly reduced by such arrangement.
(FR)L'invention concerne un circuit intégré monolithique et plus particulièrement un circuit intégré pour des applications radiofréquence, comprenant un transistor (11 ; 51), de préférence un transistor LDMOS de puissance, ainsi qu'une inductance spirale (12 ; 26 ; 41 ; 52 ; 53), de préférence une inductance de blocage RF. L'inductance spirale est disposée au-dessus du transistor, le couplage électromagnétique entre ladite inductance spirale et ledit transistor n'étant en principe pas possible à éviter. Toutefois, le transistor présente une configuration de type peigne (13a-k, 14a-f) pour éviter les courants de Foucault importants causés par le couplage électromagnétique. La surface de puce nécessaire pour le circuit est ainsi sensiblement réduite par cette configuration.
Designated States: AE, AG, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BW, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, HR, HU, ID, IL, IN, IS, JP, KE, KG, KP, KR, KZ, LC, LK, LR, LS, LT, LU, LV, MA, MD, MG, MK, MN, MW, MX, MZ, NA, NI, NO, NZ, OM, PG, PH, PL, PT, RO, RU, SC, SD, SE, SG, SK, SL, SM, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, YU, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IS, IT, LT, LU, MC, NL, PL, PT, RO, SE, SI, SK, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language: English (EN)
Filing Language: English (EN)