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Machine translation
1. (WO2005062463) BIASED DARLINGTON TRANSISTOR PAIR, METHOD, AND SYSTEM
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2005/062463    International Application No.:    PCT/US2004/038730
Publication Date: 07.07.2005 International Filing Date: 17.11.2004
IPC:
H03F 1/22 (2006.01), H03F 1/30 (2006.01), H03F 3/343 (2006.01)
Applicants: INTEL CORPORATION [US/US]; 2200 Mission College Boulevard, Santa Clara, CA 95052 (US) (For All Designated States Except US).
GLASS, Kevin [US/US]; (US) (For US Only).
SMITH, Malcolm [GB/US]; (US) (For US Only)
Inventors: GLASS, Kevin; (US).
SMITH, Malcolm; (US)
Agent: LEMOINE, Dana, B.; Lemoine Patent Services, PLLC, Portfolio IP, P.O. Box 52050, Minneapolis, MN 55402 (US)
Priority Data:
10/727,262 03.12.2003 US
Title (EN) BIASED DARLINGTON TRANSISTOR PAIR, METHOD, AND SYSTEM
(FR) PAIRE DE TRANSISTORS DE DARLINGTON A POLARISATION, PROCEDE ET SYSTEME
Abstract: front page image
(EN)An amplifier includes a Darlington transistor pair (110, 120) and a biasing network to increase bias currents in an input transistor (110). Circuit (100) includes in put transistor (110), second transistior (120), radio frequency (RF) choke (112), degeneration inductor (122), capacitopr (132) and voltage controlled current source (130). Input transistor (110) and second transistor (120) are coupled to form a Darlington transistor pair with the collectors coupled together at node (142), and the emitter of input transistor (120) at node (111).
(FR)L'invention concerne un amplificateur qui comprend une paire de transistors de Darlington (110, 120) et un réseau de polarisation permettant d'augmenter les courants de polarisation dans un transistor d'entrée (110). On décrit un circuit (100) qui comprend un transistor d'entrée (110), un second transistor (120), une bobine d'arrêt HF (112), un inducteur de contre-réaction (122), un condensateur (132) et une source de courant commandée en tension (130). Les deux transistors (110) et (120) sont couplés pour former une paire de transistors de Darlington avec les collecteurs couplés mutuellement au niveau du noeud (142), et l'émetteur du transistor d'entrée (110) est couplé à la base du transistor d'entrée (120) au niveau du noeud (111).
Designated States: AE, AG, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BW, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, HR, HU, ID, IL, IN, IS, JP, KE, KG, KP, KR, KZ, LC, LK, LR, LS, LT, LU, LV, MA, MD, MG, MK, MN, MW, MX, MZ, NA, NI, NO, NZ, OM, PG, PH, PL, PT, RO, RU, SC, SD, SE, SG, SK, SL, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, YU, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IS, IT, LU, MC, NL, PL, PT, RO, SE, SI, SK, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language: English (EN)
Filing Language: English (EN)