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Machine translation
1. (WO2005038676) METHOD AND APPARATUS FOR EMULATION OF LOGIC CIRCUITS
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2005/038676    International Application No.:    PCT/US2004/034472
Publication Date: 28.04.2005 International Filing Date: 18.10.2004
IPC:
G06F 17/50 (2006.01)
Applicants: UNIVERSITY OF DELAWARE [US/US]; 210 Hullihen Hall, Newark, DE 19711 (US) (For All Designated States Except US).
SAKANE, Hirofumi [JP/US]; (US) (For US Only).
YAKAY, Levent [TR/US]; (US) (For US Only).
KARNA, Vishal [IN/US]; (US) (For US Only).
LEUNG, Clement [US/US]; (US) (For US Only).
GAO, Guang, R. [CN/US]; (US) (For US Only)
Inventors: SAKANE, Hirofumi; (US).
YAKAY, Levent; (US).
KARNA, Vishal; (US).
LEUNG, Clement; (US).
GAO, Guang, R.; (US)
Agent: KRIKELIS, Costas, S.; RatnerPrestia, P.O. Box 1596, Wilmington, DE 19899 (US)
Priority Data:
60/512,376 17.10.2003 US
Title (EN) METHOD AND APPARATUS FOR EMULATION OF LOGIC CIRCUITS
(FR) PROCEDE ET APPAREIL POUR L'EMULATION DE CIRCUITS LOGIQUES
Abstract: front page image
(EN)A method for emulating a logic circuit having at least one set of identical logic modules is disclosed. Each logic module in a set has logic elements and memory elements that store a module state of that logic module. The logic circuit is emulated by extracting a logic module from a set of identical logic modules, translating the extracted logic module for iterative representation of the module state of each of the logic modules with a single instance of the logic elements, and configuring a logic device with the translated logic module to emulate the logic circuit.
(FR)L'invention porte sur un procédé d'émulation d'un circuit logique possédant au moins un ensemble de modules logiques identiques. Chaque module logique d'un ensemble possède des éléments logiques et des éléments de mémoire qui stockent un état de ce module logique. Le circuit logique est émulé par extraction d'un module logique d'un ensemble de modules logiques identiques, translatant le module logique extrait pour une représentation itérative de l'état de chacun des modules logiques avec une instance unique des éléments logiques et configurant un dispositif logique avec le module logique translaté pour émuler le circuit logique.
Designated States: AE, AG, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BW, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, HR, HU, ID, IL, IN, IS, JP, KE, KG, KP, KR, KZ, LC, LK, LR, LS, LT, LU, LV, MA, MD, MG, MK, MN, MW, MX, MZ, NA, NI, NO, NZ, OM, PG, PH, PL, PT, RO, RU, SC, SD, SE, SG, SK, SL, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, YU, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IT, LU, MC, NL, PL, PT, RO, SE, SI, SK, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language: English (EN)
Filing Language: English (EN)