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1. (WO2005034191) TEMPLATE LAYER FORMATION
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2005/034191    International Application No.:    PCT/US2004/030088
Publication Date: 14.04.2005 International Filing Date: 14.09.2004
IPC:
H01L 21/00 (2006.01), H01L 21/31 (2006.01), H01L 21/84 (2006.01), H01L 21/331 (2006.01), H01L 21/336 (2006.01), H01L 21/338 (2006.01), H01L 21/8234 (2006.01)
Applicants: FREESCALE SEMICONDUCTOR, INC. [US/US]; 6501 William Cannon Drive West, Austin, Texas 78735 (US) (For All Designated States Except US).
LIU, Chun-Li [US/US]; (US) (For US Only).
SADAKA, Mariam, G. [LB/US]; (US) (For US Only).
BARR, Alexander, L. [US/FR]; (FR) (For US Only).
NGUYEN, Bich-Yen [US/US]; (US) (For US Only).
THEAN, Voon-Yew [SG/US]; (US) (For US Only).
THOMAS, Shawn, G. [US/US]; (US) (For US Only).
WHITE, Ted, R. [US/US]; (US) (For US Only).
XIE, Qianghua [CN/US]; (US) (For US Only)
Inventors: LIU, Chun-Li; (US).
SADAKA, Mariam, G.; (US).
BARR, Alexander, L.; (FR).
NGUYEN, Bich-Yen; (US).
THEAN, Voon-Yew; (US).
THOMAS, Shawn, G.; (US).
WHITE, Ted, R.; (US).
XIE, Qianghua; (US)
Agent: KING, Robert, L.; Corporate Law Department, Intellectual Property Section, 7700 West Parmer Lane, MD: TX32/PL02, Austin, Texas 78729 (US)
Priority Data:
10/670,928 25.09.2003 US
10/919,784 17.08.2004 US
Title (EN) TEMPLATE LAYER FORMATION
(FR) FORMATION DE COUCHES GABARIT
Abstract: front page image
(EN)A process for forming strained semiconductor layers. The process include flowing a chlorine bearing gas (e.g. hydrogen chloride, chlorine, carbon tetrachloride, and trichloroethane) over the wafer while heating the wafer. In one example, the chorine bearing gas is flowed during a condensation process on a semiconductor layer that is used as a template layer for forming a strain semiconductor layer (e.g. strain silicon). In other examples, the chlorine bearing gas is flowed during a post bake of the wafer after the condensation operation.
(FR)La présente invention concerne un processus de formation de couches semiconductrices contraintes. Ce processus consiste à faire s'écouler un gaz porteur de chlore (par exemple du chlorure d'hydrogène, du chlore, du tétrachlorure de carbone et du trichloréthane) sur la plaquette alors qu'on chauffe cette plaquette. Dans un exemple, le gaz porteur de chlore est écoulé pendant un processus de condensation sur une couche semiconductrice qui est utilisée comme couche gabarit pour former une couche semiconductrice contrainte (par exemple de silicium contraint). Dans d'autres exemples, le gaz porteur de chlore est écoulé pendant une cuisson postérieure de la plaquette après l'opération de condensation.
Designated States: AE, AG, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BW, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, HR, HU, ID, IL, IN, IS, JP, KE, KG, KP, KR, KZ, LC, LK, LR, LS, LT, LU, LV, MA, MD, MG, MK, MN, MW, MX, MZ, NA, NI, NO, NZ, OM, PG, PH, PL, PT, RO, RU, SC, SD, SE, SG, SK, SL, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, YU, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IT, LU, MC, NL, PL, PT, RO, SE, SI, SK, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language: English (EN)
Filing Language: English (EN)