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Machine translation
1. (WO2005034188) IMAGING SYSTEM WITH LOW FIXED PATTERN NOISE
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2005/034188    International Application No.:    PCT/US2004/029827
Publication Date: 14.04.2005 International Filing Date: 14.09.2004
IPC:
H04N 3/14 (2006.01), H04N 5/217 (2011.01), H04N 5/335 (2011.01)
Applicants: ALTASENS, INC. [US/US]; 1049 Camino Dos Rios, Thousand Oaks, CA 91360 (US) (For All Designated States Except US).
KOZLOWSKI, Lester, J. [US/US]; (US) (For US Only).
LOOSE, Marcus [US/US]; (US) (For US Only)
Inventors: KOZLOWSKI, Lester, J.; (US).
LOOSE, Marcus; (US)
Agent: JOHNSON, Doyle, B.; Reed Smith LLP, Suite 2000, Two Embarcadero Center, San Francisco, CA 94111 (US)
Priority Data:
60/507,346 30.09.2003 US
10/776,952 11.02.2004 US
Title (EN) IMAGING SYSTEM WITH LOW FIXED PATTERN NOISE
(FR) SYSTEME D'IMAGERIE CMOS PRESENTANT UN FAIBLE BRUIT A MOTIF FIXE (FPN)
Abstract: front page image
(EN)A CMOS imager system (300,400) including an active pixel sensor (302) having access supply which provides distributed feedback, a column buffer (304) (having gain and FPN suppression), and an A/D converter (312) co-located with the sensor such that the effective transmission path between the column buffer (or optional analog PGA) and the A/D converter (312) acts as a resistor, rather than a reactance. The system may further include both an analog gain amplifier stage and a digital programmable amplifier stage (314,402).
(FR)L'invention concerne un système d'imagerie CMOS comprenant un capteur à pixels actifs présentant un bloc d'accès permettant une rétroaction distribuée, un tampon de colonne (présentant un gain et une suppression FPN), ainsi qu'un convertisseur A/N co-situé avec le capteur, de sorte que la trajectoire de transmission efficace entre le tampon de colonne (ou un PGA analogique éventuel) et le convertisseur A/N agit en tant que résistance plutôt que réactance. Le système peut également inclure à la fois un étage d'amplificateur de gain analogique et un étage d'amplificateur programmable numérique.
Designated States: AE, AG, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BW, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, HR, HU, ID, IL, IN, IS, JP, KE, KG, KP, KR, KZ, LC, LK, LR, LS, LT, LU, LV, MA, MD, MG, MK, MN, MW, MX, MZ, NA, NI, NO, NZ, OM, PG, PH, PL, PT, RO, RU, SC, SD, SE, SG, SK, SL, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, YU, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IT, LU, MC, NL, PL, PT, RO, SE, SI, SK, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language: English (EN)
Filing Language: English (EN)