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1. WO2005022591 - REVERSIBLE LEADLESS PACKAGE AND METHODS OF MAKING AND USING SAME

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Publication Number WO/2005/022591
Publication Date 10.03.2005
International Application No. PCT/US2004/026790
International Filing Date 18.08.2004
IPC
H01L 21/44 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
34the devices having semiconductor bodies not provided for in groups H01L21/06, H01L21/16, and H01L21/18159
44Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/36-H01L21/428158
CPC
H01L 21/4832
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
4814Conductive parts
4821Flat leads, e.g. lead frames with or without insulating supports
4828Etching
4832Etching a temporary substrate after encapsulation process to form leads
H01L 21/561
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, ; e.g. sealing of a cap to a base of a container
56Encapsulations, e.g. encapsulation layers, coatings
561Batch processing
H01L 21/568
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, ; e.g. sealing of a cap to a base of a container
56Encapsulations, e.g. encapsulation layers, coatings
568Temporary substrate used as encapsulation process aid
H01L 2221/68377
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2221Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
683for supporting or gripping
68304using temporarily an auxiliary support
68377with parts of the auxiliary support remaining in the finished device
H01L 2224/05568
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
05of an individual bonding area
0554External layer
0556Disposition
05568the whole external layer protruding from the surface
H01L 2224/05573
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
05of an individual bonding area
0554External layer
05573Single external layer
Applicants
  • ADVANCED INTERCONNECT TECHNOLOGIES LIMITED [MU]/[MU] (AllExceptUS)
  • ISLAM, Shafidul [US]/[US] (UsOnly)
  • SAN ANTONIO, Romarico, Santos [PH]/[ID] (UsOnly)
Inventors
  • ISLAM, Shafidul
  • SAN ANTONIO, Romarico, Santos
Agents
  • OLSON, Timothy, J.
Priority Data
60/497,82926.08.2003US
Publication Language English (en)
Filing Language English (EN)
Designated States
Title
(EN) REVERSIBLE LEADLESS PACKAGE AND METHODS OF MAKING AND USING SAME
(FR) BOITIER A SOUDER REVERSIBLE, SON PROCEDE DE PRODUCTION ET SON UTILISATION
front page image
Abstract
(EN) A semiconductor device package includes an electrically conductive lead frame having a plurality of posts disposed at a perimeter of the package. Each of the posts has a first contact surface disposed at the first package face and a second contact surface disposed at the second package face. The lead frame also includes a plurality of post extensions disposed at the second package face. Each of the post extensions includes a bond site formed on a surface of the post extension opposite the second package face. At least one I/O pads on the semiconductor device is electrically connected to the post extension at the bond site using wirebonding, tape automated bonding, or flip-chip methods. The package can be assembled use a lead frame having pre-formed leads, with or without taping, or it can employ the use of partially etched lead frames. A stack of the semiconductor device packages may be formed.
(FR) L'invention concerne un boîtier d'un dispositif à semi-conducteurs comprenant une grille de connexion électroconductrice ayant une pluralité de tiges disposées sur le pourtour du boîtier. Chaque tige a une première surface de contact placée sur la première face de boîtier et une deuxième surface de contact placée sur la deuxième face de boîtier. La grille de connexion comprend également une pluralité de prolongements de tiges placés sur la deuxième face du boîtier. Chaque prolongement de tige comporte un site de liaison formé sur une surface du prolongement de tige opposé à la deuxième face du boîtier. Au moins une plage E/S sur le dispositif à semi-conducteurs est électriquement reliée au prolongement de tige au niveau du site de liaison par connexion de fils, soudage sur bande ou par des procédés de puce à bosse. Le boîtier peut être assemblé à l'aide d'une grille de connexion ayant des conducteurs préformés, avec ou sans ruban adhésif, ou bien il peut utiliser des grilles de connexion partiellement gravées. On peut ainsi former un empilement de boîtiers de dispositifs à semi-conducteurs.
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