Processing

Please wait...

PATENTSCOPE will be unavailable a few hours for maintenance reason on Tuesday 25.01.2022 at 12:00 PM CET
Settings

Settings

Goto Application

1. WO2004107423 - METHOD OF PRODUCING FILM-THINNING CIRCUIT BOARD HAVING PENETRATED STRUCTURE AND PROTECTING ADHESIVE TAPE

Publication Number WO/2004/107423
Publication Date 09.12.2004
International Application No. PCT/JP2004/005008
International Filing Date 07.04.2004
IPC
H05K 3/00 2006.1
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3Apparatus or processes for manufacturing printed circuits
CPC
B23K 26/364
BPERFORMING OPERATIONS; TRANSPORTING
23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
26Working by laser beam, e.g. welding, cutting or boring
36Removing material
362Laser etching
364for making a groove or trench, e.g. for scribing a break initiation groove
B81C 1/00619
BPERFORMING OPERATIONS; TRANSPORTING
81MICROSTRUCTURAL TECHNOLOGY
CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
1Manufacture or treatment of devices or systems in or on a substrate
00436Shaping materials, i.e. techniques for structuring the substrate or the layers on the substrate
00555Achieving a desired geometry, i.e. controlling etch rates, anisotropy or selectivity
00619Forming high aspect ratio structures having deep steep walls
H01L 21/30
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
H05K 2203/0191
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
2203Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
01Tools for processing; Objects used during processing
0191Using tape or non-metallic foil in a process, e.g. during filling of a hole with conductive paste
H05K 2203/025
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
2203Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
02Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
025Abrading, e.g. grinding or sand blasting
H05K 2203/1476
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
2203Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
14Related to the order of processing steps
1476Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
Applicants
  • THE FURUKAWA ELECTRIC CO. LTD. [JP]/[JP] (AllExceptUS)
  • 石渡 伸一 ISHIWATA, Shinichi [JP]/[JP] (UsOnly)
  • 稲田 政勝 INADA, Masakatsu [JP]/[JP] (UsOnly)
Inventors
  • 石渡 伸一 ISHIWATA, Shinichi
  • 稲田 政勝 INADA, Masakatsu
Agents
  • 飯田 敏三 IIDA, Toshizo
Priority Data
2003-15321629.05.2003JP
Publication Language Japanese (ja)
Filing Language Japanese (JA)
Designated States
Title
(EN) METHOD OF PRODUCING FILM-THINNING CIRCUIT BOARD HAVING PENETRATED STRUCTURE AND PROTECTING ADHESIVE TAPE
(FR) PROCEDE DE PRODUCTION DE CARTE CIRCUIT A AMINCISSEMENT DE COUCHE A STRUCTURE PENETREE ETE BANDE ADHESIVE DE PROTECTION
(JA) 貫通構造を有する薄膜化回路基板の製造方法と保護用粘着テープ
Abstract
(EN) A method of producing a film-thinning circuit board, comprising the steps of (a) grooving a candidate penetration portion in the surface of a circuit board to at least a depth as much as the thickness of a final product, (b) attaching a protecting adhesive tape to the grooved surface of the circuit board before the rear surface of the circuit board is ground, (c) grinding the rear surface of a circuit board to a depth short of allowing the grooved portion to be penetrated, (d) dry-etching the entire rear surface of the circuit board with the protecting adhesive tape kept attached after the rear surface of the circuit board is ground, and (e) forming a penetrated structure by allowing the grooved portion in the surface of the circuit board to be pernetrated by the dry-etching; and a protecting adhesive tape used in this method.
(FR) La présente invention concerne un procédé de production d'une carte circuit à amincissement de couche. Ce procédé réunit plusieurs opérations. (a) On creuse des sillons dans une partie candidate à la pénétration de la surface d'une carte circuit jusqu'à au moins une profondeur équivalente à l'épaisseur d'un produit final. (b) On fixe une bande adhésive de protection sur la surface creusée de sillons de la carte circuit avant le meulage de la face postérieure de la carte circuit. (c) On meule la face postérieure d'une carte circuit jusqu'à une profondeur ne permettant pas la pénétration de la partie creusée de sillons. (d) On réalise un mordançage à sec de toute la surface postérieure de la carte circuit, la bande adhésive de protection restant fixée après le meulage de la surface postérieure de la carte circuit. Enfin, (e) pour former une structure pénétrée, on laisse la partie creusée de sillons dans la surface de la carte circuit se faire pénétrer par le mordançage à sec. L'invention concerne également une bande adhésive de protection utilisée pour ce procédé.
(JA)  (a)予め回路基板表面に貫通部相当部を、少なくとも回路基板の最終製品厚さ程度の深さに溝切り加工し、 (b)回路基板の裏面研削加工前に、溝切り加工された回路基板表面に保護用粘着テープを貼合し、 (c)予め溝切り加工された部位が貫通しない程度の厚さまで回路基板の裏面研削加工を施し、 (d)回路基板の裏面研削加工終了後に当該保護用粘着テープを貼り合わせたまま、回路基板の裏面全面をドライエッチング処理し、 (e)当該ドライエッチング処理により、回路基板表面の溝切り加工部を貫通させ貫通構造部を形成する各工程を有する、薄膜化回路基板の製造方法;及び、該方法に用いる保護用粘着テープ。
Latest bibliographic data on file with the International Bureau