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1. (WO2004017379) PROCESS AND SYSTEM FOR PROCESSING A THIN FILM SAMPLE AND THIN FILM STRUCTURE
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2004/017379 International Application No.: PCT/US2003/025946
Publication Date: 26.02.2004 International Filing Date: 19.08.2003
IPC:
H01L 21/20 (2006.01) ,H01L 21/336 (2006.01) ,H01L 21/84 (2006.01) ,H01L 27/12 (2006.01) ,H01L 29/786 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
20
Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334
Multistep processes for the manufacture of devices of the unipolar type
335
Field-effect transistors
336
with an insulated gate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78
with subsequent division of the substrate into plural individual devices
82
to produce devices, e.g. integrated circuits, each consisting of a plurality of components
84
the substrate being other than a semiconductor body, e.g. being an insulating body
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12
the substrate being other than a semiconductor body, e.g. an insulating body
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
786
Thin-film transistors
Applicants:
THE TRUSTEES OF COLUMBIA UNIVERSITY IN THE CITY OF NEW YORK [US/US]; 116th Street and Broadway New York, NY 10027, US (AllExceptUS)
IM, James, S. [US/US]; US (UsOnly)
Inventors:
IM, James, S.; US
Agent:
TANG, Henry ; Baker & Botts, LLP 30 Rockefeller Plaza New York, NY 10112-4498, US
Priority Data:
60/405,08419.08.2002US
Title (EN) PROCESS AND SYSTEM FOR PROCESSING A THIN FILM SAMPLE AND THIN FILM STRUCTURE
(FR) PROCEDE ET SYSTEME DE TRAITEMENT PAR CRISTALLISATION LASER DE REGIONS DE COUCHES MINCES SUR UN SUBSTRAT PERMETTANT D'OBTENIR UNE GRANDE UNIFORMITE, ET STRUCTURE DESDITES REGIONS DE COUCHES MINCES
Abstract:
(EN) A process and system for processing a thin film sample (e.g., a semiconductor thin film), as well as the thin film structure are provided. In particular, a beam generator can be controlled to emit at least one beam pulse. With this beam pulse, at least one portion of the film sample is irradiated with sufficient intensity to fully melt such section of the sample throughout its thickness, and the beam pulse having a predetermined shape. This portion of the film sample is allowed to re­solidify, and the re-solidified at least one portion is composed of a first area and a second area. Upon the re-solidification thereof, the first area includes large grains, and the second area has a region formed through nucleation. The first area surrounds the second area and has a grain structure which is different from a grain structure of the second area. The second area is configured to facilitate thereon an active region of an electronic device.
(FR) L'invention concerne un procédé et un système de traitement d'un échantillon de couche mince (par exemple, une couche mince de semi-conducteur), ainsi que la structure de couche mince. En particulier, un générateur de faisceau peut être commandé afin d'émettre au moins une impulsion laser. Au moyen de celle-ci, au moins une partie de l'échantillon de couche mince est irradiée à une intensité suffisante pour faire fondre complètement cette section d'échantillon sur toute son épaisseur, l'impulsion laser présentant une forme prédéterminée. Ladite partie de l'échantillon de couche mince est ensuite resolidifiée, et est composée d'une première et d'une deuxième surface. Après resolidification, la première surface de ladite partie d'échantillon de couche mince comprend des gros grains, et la deuxième possède une région formée par nucléation. La première surface entoure la deuxième et possède une structure de grain différente de celle de la deuxième surface. Ladite deuxième surface est conçue pour faciliter le positionnement sur celle-ci d'une région active d'un dispositif électronique.
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Designated States: AE, AG, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DZ, EC, EE, ES, FI, GB, GD, GE, GH, GM, HR, HU, ID, IL, IN, IS, JP, KE, KG, KP, KR, KZ, LC, LK, LR, LS, LT, LU, LV, MA, MD, MG, MK, MN, MW, MX, MZ, NI, NO, NZ, OM, PG, PH, PL, PT, RO, RU, SC, SD, SE, SG, SK, SL, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, YU, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (GH, GM, KE, LS, MW, MZ, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IT, LU, MC, NL, PT, RO, SE, SI, SK, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)
Also published as:
KR1020050052477JP2006511064US20050202654CN1774791AU2003258288