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Machine translation
1. (WO2003077422) CALIBRATION TECHNIQUES FOR FREQUENCY SYNTHESIZERS
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2003/077422    International Application No.:    PCT/US2003/006955
Publication Date: 18.09.2003 International Filing Date: 04.03.2003
Chapter 2 Demand Filed:    06.10.2003    
IPC:
H03L 7/099 (2006.01), H03L 7/113 (2006.01), H03L 7/199 (2006.01)
Applicants: QUALCOMM, INCORPORATED [US/US]; 5775 Morehouse Drive, San Diego, CA 92121 (US)
Inventors: DUNWORTH, Jeremy, D.; (US).
WALKER, Brett, C.; (US)
Agent: WADSWORTH, Philip, R.; 5775 Morehouse Drive, San Diego, CA 92121 (US)
Priority Data:
10/092,669 06.03.2002 US
Title (EN) CALIBRATION TECHNIQUES FOR FREQUENCY SYNTHESIZERS
(FR) TECHNIQUES D'ETALONNAGE POUR SYNTHETISEURS DE FREQUENCES
Abstract: front page image
(EN)In one embodiment, this disclosure describes a frequency synthesizer for use in a wireless communication device, or similar device that requires precision frequency synthesis but small amounts of noise. In particular, the frequency synthesizer may include a phase locked loop (PLL) and an integrated voltage controlled oscillator (VCO). The frequency synthesizer may implement one or more calibration techniques to quickly and precisely calibrate the VCO. In this manner, the analog gain of the VCO can be significantly reduced, which may improve performance of the wireless communication device. Also, the initial state of the PLL may be improved to reduce lock time of the PLL, which may enhance performance of the wireless communication device. The calibration techniques include: (i) comparing the VCO frequency with a reference frequency, wherein the loop dividers are used for frequency discrimination in an open loop calibration mode and are started simultaneously in order to improve the time for calibration; (ii) calibrating the oscillator at an actual temperature to a correspoinding calibration frequency and (iii) generating, in a temperature compensation circuitry, a calibration parameter supplied to a configurable circuitry in the oscillator in order to define an initial frequency of the oscillator.
(FR)Selon un mode de réalisation, l'invention concerne un synthétiseur de fréquences destiné à un appareil de radiocommunications, ou un appareil semblable nécessitant une synthèse de fréquences de précision mais de petites quantités de bruit. En particulier, le synthétiseur de fréquences peut inclure une boucle PLL et un oscillateur commandé en tension intégré. Le synthétiseur de fréquences peut mettre en oeuvre une ou plusieurs techniques d'étalonnage pour étalonner rapidement et avec prévision l'oscillateur commandé en tension. De cette façon, le gain analogique de l'oscillateur peut être notablement réduit, ce qui peut améliorer le rendement de l'appareil de radiocommunications. De la même façon, l'état initial de la boucle PLL peut être amélioré de façon à réduire son temps de verrouillage, ce qui peut renforcer la puissance de l'appareil de radiocommunications.
Designated States: AE, AG, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DZ, EC, EE, ES, FI, GB, GD, GE, GH, GM, HR, HU, ID, IL, IN, IS, JP, KE, KG, KP, KR, KZ, LC, LK, LR, LS, LT, LU, LV, MA, MD, MG, MK, MN, MW, MX, MZ, NO, NZ, OM, PH, PL, PT, RO, RU, SC, SD, SE, SG, SK, SL, TJ, TM, TN, TR, TT, TZ, UA, UG, UZ, VC, VN, YU, ZA, ZM, ZW.
African Regional Intellectual Property Organization (GH, GM, KE, LS, MW, MZ, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IT, LU, MC, NL, PT, RO, SE, SI, SK, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language: English (EN)
Filing Language: English (EN)