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1. (WO2003054565) COMPACT ATE WITH TIMESTAMP SYSTEM

Pub. No.:    WO/2003/054565    International Application No.:    PCT/US2002/039658
Publication Date: Jul 3, 2003 International Filing Date: Dec 11, 2002
IPC: G01R 31/3193
G11C 29/56
Applicants: TERADYNE, INC.
Inventors: SARTSCHEV, Ronald, A.
XU, Jun
Title: COMPACT ATE WITH TIMESTAMP SYSTEM
Abstract:
A accurate time measurement circuit (100). The design is amenable to implementation as a CMOS integrated circuits, making the circuit suitable for a highly integrated system, such as automatic test equipment where multiple time measurement circuits are required. The circuit uses a delay locked loop (210) to generate a plurality of signals that are delayed in time by an interval D. The signal is fed to a bank of delay elements, (230) each with a slightly different delay with the difference in delay between the first and the last being more than D. An accurate time measurement is achieved by finding coincidence between one of the TAP signals and one of the delay signals. The circuit has much greater accuracy than a traditional delay line based time measurement circuit with the same number of taps. It therefore provides both accuracy and fast re-fire time and is less susceptible to noise.