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1. WO2003007385 - SINGLE-ELECTRON TRANSISTORS AND FABRICATION METHODS IN WHICH A PROJECTING FEATURE DEFINES SPACING BETWEEN ELECTRODES

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Publication Number WO/2003/007385
Publication Date 23.01.2003
International Application No. PCT/US2002/022260
International Filing Date 12.07.2002
Chapter 2 Demand Filed 31.01.2003
IPC
H01L 29/76 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66Types of semiconductor device
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76Unipolar devices
H01L 49/00 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
49Solid state devices not provided for in groups H01L27/-H01L47/99; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof
CPC
B82Y 10/00
BPERFORMING OPERATIONS; TRANSPORTING
82NANOTECHNOLOGY
YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
10Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
H01L 29/7613
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
76Unipolar devices ; , e.g. field effect transistors
7613Single electron transistors; Coulomb blockade devices
H01L 49/006
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
49Solid state devices not provided for in groups H01L27/00 - H01L47/00 and H01L51/00 and not provided for in any other subclass; Processes or apparatus peculiar to the manufacture or treatment thereof or of parts thereof
006Quantum devices, e.g. Quantum Interference Devices, Metal Single Electron Transistor
Y10S 438/962
YSECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
10TECHNICAL SUBJECTS COVERED BY FORMER USPC
STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
438Semiconductor device manufacturing: process
962Quantum dots and lines
Y10S 977/937
YSECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
10TECHNICAL SUBJECTS COVERED BY FORMER USPC
STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
977Nanotechnology
902Specified use of nanostructure
932for electronic or optoelectronic application
936in a transistor or 3-terminal device
937Single electron transistor
Y10T 428/24612
YSECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
10TECHNICAL SUBJECTS COVERED BY FORMER USPC
TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
428Stock material or miscellaneous articles
24Structurally defined web or sheet [e.g., overall dimension, etc.]
24479including variation in thickness
24612Composite web or sheet
Applicants
  • QUANTUM LOGIC DEVICES, INC. [US]/[US] (AllExceptUS)
  • BROUSSEAU, III, Louis, C. [US]/[US] (UsOnly)
Inventors
  • BROUSSEAU, III, Louis, C.
Agents
  • MYERS BIGEL SIBLEY & SAJOVEC
Priority Data
09/905,47113.07.2001US
Publication Language English (en)
Filing Language English (EN)
Designated States
Title
(EN) SINGLE-ELECTRON TRANSISTORS AND FABRICATION METHODS IN WHICH A PROJECTING FEATURE DEFINES SPACING BETWEEN ELECTRODES
(FR) TRANSISTORS A ELECTRON UNIQUE ET PROCEDES DE FABRICATION DE CES TRANSISTORS DANS LESQUELS UNE FORME SAILLANTE DEFINIT UN ESPACE ENTRE LES ELECTRODES
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Abstract
(EN) A single-electron transistor includes a projecting feature, such as a pyramid (150), that projects from a face of a substrate (100). A first electrode (110) is provided on the substrate face that extends onto the projecting feature. A second electrode (120) is provided on the substrate face that extends onto the projecting feature and that is spaced apart from the first electrode. At least one nanoparticle (140) is provided on the projecting feature between the first and second electrodes (110, 120). Accordingly, the geometric configuration of the projecting feature can define the spacing between the first and second electrodes (110, 120). The single-electron transistors may be fabricated by forming a projecting feature on a substrate that projects from a face thereof, forming a first electrode (110) on the substrate face that extends onto the projecting feature, forming a second electrode (120) on the substrate face that extends onto the projecting feature and that is spaced apart from the first electrode, and placing at least one nanoparticle (140) on the projecting feature between the first and second electrodes (110, 120).
(FR) Cette invention concerne un transistor à électron unique comprenant une forme saillante, telle qu'une pyramide (150), qui fait saillie à partir d'une face d'un substrat (100). Une première électrode (110) est disposée sur la face du substrat, laquelle électrode s'étend sur la forme saillante. Une deuxième électrode (120) est disposée sur la face du substrat, laquelle électrode s'étend sur la forme saillante et est espacée de la première électrode. Au moins une nanoparticule (140) est disposée sur la forme saillante entre la première et la deuxième électrode (110, 120). Ainsi, la configuration géométrique de la forme saillante peut définir un espace entre la première et la deuxième électrode (110, 120). Ces transistors à électron unique peuvent être fabriqués au moyen d'un procédé consistant à former une forme saillante sur un substrat, laquelle forme fait saillie à partir d'une face de ce substrat ; à former une première électrode (110) sur la face du substrat qui s'étend sur la forme saillante ; à former une deuxième électrode (120) sur la face du substrat, laquelle électrode s'étend sur la forme saillante et est espacée de la première électrode ; et à placer au moins une nanoparticule (140) sur la forme saillante entre la première et la deuxième électrode (110, 120).
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