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1. (WO2003003426) OPTO-ELECTRONIC DEVICE INTEGRATION
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2003/003426 International Application No.: PCT/US2002/022291
Publication Date: 09.01.2003 International Filing Date: 28.06.2002
Chapter 2 Demand Filed: 28.01.2003
IPC:
G02B 6/42 (2006.01) ,H01L 25/16 (2006.01) ,H01L 27/15 (2006.01) ,H01S 5/02 (2006.01) ,H01S 5/40 (2006.01) ,H01S 5/42 (2006.01)
G PHYSICS
02
OPTICS
B
OPTICAL ELEMENTS, SYSTEMS, OR APPARATUS
6
Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
24
Coupling light guides
42
Coupling light guides with opto-electronic elements
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
16
the devices being of types provided for in two or more different main groups of groups H01L27/-H01L51/139
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
15
including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
S
DEVICES USING STIMULATED EMISSION
5
Semiconductor lasers
02
Structural details or components not essential to laser action
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
S
DEVICES USING STIMULATED EMISSION
5
Semiconductor lasers
40
Arrangement of two or more semiconductor lasers, not provided for in groups H01S5/02-H01S5/30128
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
S
DEVICES USING STIMULATED EMISSION
5
Semiconductor lasers
40
Arrangement of two or more semiconductor lasers, not provided for in groups H01S5/02-H01S5/30128
42
Arrays of surface emitting lasers
Applicants: DUDOFF, Greg[US/US]; US (UsOnly)
TREZZA, John[US/US]; US (UsOnly)
XANOPTIX, INC.[US/US]; 10 Al Paul Lane Merrimack, NH 03054, US (AllExceptUS)
Inventors: DUDOFF, Greg; US
TREZZA, John; US
Agent: STRAUSSMAN, Richard; Morgan & Finnegan, L.L.P. 345 Park Avenue New York, NY 10154, US
Priority Data:
09/896,18929.06.2001US
09/896,98329.06.2001US
09/897,15829.06.2001US
09/897,16029.06.2001US
60/365,99619.03.2002US
60/365,99819.03.2002US
60/366,03219.03.2002US
Title (EN) OPTO-ELECTRONIC DEVICE INTEGRATION
(FR) INTEGRATION DE DISPOSITIFS OPTOELECTRONIQUES
Abstract:
(EN) A method of integrating a chip with a topside optical chip has at least one optical device, having an active side including an optically active region, a laser cavity having a height, an optically inactive region, a bonding side opposite the active side, and a device thickness. The method involves bonding the optical chip to the electronic chip; appying a substrate to the active side, the substrate having a substrate thickness over the active region in the range of between a first amount and a second amount, and applying an antireflection without a special patterning or distinguishing between the at least one optical laser device and the other device.
(FR) L'invention concerne un procédé qui permet d'intégrer une puce à une puce optique à face supérieure active possédant au moins un dispositif optique, qui présente une face active comprenant une zone optiquement active, une cavité laser qui présente une hauteur, une zone optiquement inactive, une face de soudure opposée à la face inactive, et une épaisseur de dispositif. Ce procédé consiste à souder la puce optique à la puce électronique; à appliquer un substrat sur la face active, ledit substrat présentant une épaisseur de substrat sur la zone active dont la valeur est comprise entre une première valeur et une seconde valeur, et à appliquer une couche antireflet sans motif particulier ni distinction entre le ou les dispositifs laser optiques et l'autre dispositif.
front page image
Designated States: AE, AG, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DZ, EC, EE, ES, FI, GB, GD, GE, GH, GM, HR, HU, ID, IL, IN, IS, JP, KE, KG, KP, KR, KZ, LC, LK, LR, LS, LT, LU, LV, MA, MD, MG, MK, MN, MW, MX, MZ, NO, NZ, OM, PH, PL, PT, RO, RU, SD, SE, SG, SI, SK, SL, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VN, YU, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (GH, GM, KE, LS, MW, MZ, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (EPO) (AT, BE, CH, CY, DE, DK, ES, FI, FR, GB, GR, IE, IT, LU, MC, NL, PT, SE, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)