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1. (WO2002103767) EPITAXIAL SIO¿X? BARRIER/INSULATION LAYER______________________
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C L A I M S
1. A method for producing an insulating or barrier layer, useful for semiconductor devices, on a silicon substrate, which comprises depositing a layer of silicon and at least one additional element on said silicon substrate whereby said deposited layer is substantially free of defects such that epitaxial silicon substantially free of defects can be deposited on said deposited layer.
2. A method according to claim 1, wherein said additional element is selected from the group consisting of oxygen, carbon, nitrogen, phosphorus, sulfur, hydrogen, antimony and arsenic, and combinations thereof.
3. A method according to claim 1, wherein said additional element is oxygen.
4. A method according to claim 3, wherein said deposited layer comprises SiOx wherein 0 < x < 2.0.
5. A method according to claim 4, wherein silicon and oxygen are deposited simultaneously.
6. A method according to claim 1, wherein silicon and said at least one additional element are deposited simultaneously.
7. A method according to claim 1, wherein said deposited layer is essentially epitaxial.
8. A method according to claim 1, wherein the surface of said silicon substrate is epitaxial.
9. A method according to claim 1, wherein a plurality of insulating layers are deposited to form a barrier comprising a plurality of insulating layers sandwiched between epitaxial silicon.
10. A method according to claim 9, wherein said additional elements comprise oxygen and at least one other of said additional elements.
11. A method according to claim 10, wherein oxygen is diffused into said deposited layer and is trapped by said at least one other of said additional elements.
12. A method according to claim 11 , wherein the produced battier is annealed in an oxygen atmosphere.
13. A method according to claim 9, wherein the values of dielectric constant and barrier height of the produced barrier are adjusted to desired values by controlling the oxygen content of said barrier.

14. A method according to claim 9, wherein a barrier with a controlled gradient of oxygen content is produced by adjusting the oxygen content of said insulating layers.

15. A barrier composite useful for semiconductor devices, comprising an insulating layer of silicon and at least one additional element deposited on a silicon substrate whereby said insulating layer is substantially free of defects, and a deposit of epitaxial silicon substantially free of defects deposited on said insulating layer.
16. A barrier composite according to claim 15, wherein said additional element is selected from the group consisting of oxygen, carbon, nitrogen, phosphorus, sulfur, hydrogen, antimony and arsenic, and combinations thereof.
17. A barrier composite according to claim 15, wherein said additional element is oxygen.
18. A barrier composite according to claim 17, wherein said insulating layer comprises SiOx wherein O < x < 2.0.
19. A barrier composite according to claim 15, wherein said insulating layer is essentially epitaxial.
20. A barrier composite according to claim 15, wherein the surface of said silicon substrate is epitaxial.
21. A barrier composite according to claim 15, comprising a plurality of insulating layers forming a barrier comprising a plurality of insulating layers sandwiched between epitaxial silicon.
22. A barrier composite according to claim 21, wherein said additional elements comprise oxygen and at least one other of said additional elements.
23. A semiconductor device comprising a barrier composite, said barrier composite comprising an insulating layer of silicon and at least one additional element deposited on a silicon substrate whereby a deposit of epitaxial silicon substantially free of defects deposited on said insulating layer.
24. A semiconductor device according to claim 23, wherein said additional element is selected from the group consisting of oxygen, carbon, nitrogen, phosphorus, sulfur, hydrogen, antimony and arsenic, and combinations thereof.
25. A semiconductor device according to claim 23, wherein said additional element is oxygen.
26. A semiconductor device according to claim 25, wherein said insulating layer comprises SiOx wherein O < x < 2.0.
27. A semiconductor device according to claim 23, wherein said insulating layer is essentially epitaxial.
28. A semiconductor device according to claim 23, wherein the surface of said silicon substrate is epitaxial.
29. A semiconductor device according to claim 23, comprising a plurality of insulating layers forming a barrier comprising a plurality of insulating layers sandwiched between epitaxial silicon.
30. A semiconductor device according to claim 29, wherein said additional elements comprise oxygen and at least one other of said additional elements.
31. A semiconductor device according to claim 26, wherein said semiconductor device comprises a structure selected from the group comprising resonant tunneling devices, single electron field effect transistors, quatum well devices, metal oxide semiconductor field effect transistors and integrated cirucuit devices.
32. A method for producing an insulating or barrier layer, useful for semiconductor devices, on a silicon substrate, which comprises absorbing on said silicon substrate one or more elements to form a monolayer of said element or elements, onto which can be grown epitaxial silicon.
33. A method according to claim 32, wherein said elements are selected from the group consisting of oxygen, carbon, nitrogen, phosphorus, antimony and arsenic, and combinations thereof.
34. A method according to claim 33, wherein said elements comprise oxygen.
35. A method according to claim 32, wherein the surface of said silicon substrate is epitaxial.
36. A method according to claim 32, wherein a plurality of insulating layers are deposited to form a barrier comprising a plurality of insulating layers sandwiched between epitaxial silicon.
37. A semiconductor device comprising a barrier as defined in claim 36.
38. A semiconductor device according to claim 37, wherein said semiconductor device comprises a structure selected from the group comporising resonant tunneling devices, single electron field effect transistors, quantum well devices, metal oxide semiconductor field effect transistors and integrated circuit devices.