WO2002101833 MULTIPLE GATE INSULATORS WITH STRAINED SEMICONDUCTOR HETEROSTRUCTURES

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Publication Number WO/2002/101833

Publication Date 19.12.2002

International Application No. PCT/US2002/017981

International Filing Date 07.06.2002

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Applicants

AMBERWAVE SYSTEMS CORPORATION [US]/[US]

Inventors

LOCHTEFELD, Anthony
BULSARA, Mayank,

Agents

BELOBORODOV, Mark, L.

Priority Data

60/296,617

07.06.2001

Publication Language English (en)

Filing Language English (EN)

Designated States

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Title

(EN) MULTIPLE GATE INSULATORS WITH STRAINED SEMICONDUCTOR HETEROSTRUCTURES

(FR) ISOLANTS DE GRILLE MULTIPLES AVEC HETEROSTRUCTURES A SEMI-CONDUCTEURS SOLLICITEES

Abstract

(EN) A method is disclosed for forming multiple gate insulators on a strained semiconductor heterostructure as well as the devices and circuits formed therefrom. In an embodiment, the method includes the steps of depositing a first insulators on the strained semiconductor heterostructures, removing at least a portion of the first insulators from the strained semiconductor heterostructure, and depositing a second insulators on the strained semiconductor heterostructure.

(FR) L'invention concerne un procédé permettant de former de multiples isolants de grille sur une hétérostructure à semi-conducteurs sollicitée, ainsi que les dispositifs et les circuits formés à partir de ceux-ci. Dans un mode de réalisation de cette invention, ce procédé comprend les étapes consistant à déposer un premier isolant sur l'hétérostructure à semi-conducteurs sollicitée, à éliminer au moins une partie de ce premier isolant de l'hétérostructure à semi-conducteurs sollicitée, et à déposer un second isolant sur l'hétérostructure à semi-conducteurs sollicitée.

H	ELECTRICITY
01	BASIC ELECTRIC ELEMENTS
L	SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29	Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02	Semiconductor bodies
06	characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
10	with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes

H	ELECTRICITY
01	BASIC ELECTRIC ELEMENTS
L	SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29	Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
40	Electrodes
41	characterised by their shape, relative sizes or dispositions
423	not carrying the current to be rectified, amplified or switched

H	ELECTRICITY
01	BASIC ELECTRIC ELEMENTS
L	SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29	Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02	Semiconductor bodies
06	characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
10	with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes

H	ELECTRICITY
01	BASIC ELECTRIC ELEMENTS
L	SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29	Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
40	Electrodes
41	characterised by their shape, relative sizes or dispositions
423	not carrying the current to be rectified, amplified or switched

H	ELECTRICITY
01	BASIC ELECTRIC ELEMENTS
L	SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29	Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02	Semiconductor bodies ; ; Multistep manufacturing processes therefor
06	characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; ; characterised by the concentration or distribution of impurities within semiconductor regions
10	with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
1025	Channel region of field-effect devices
1029	of field-effect transistors
1033	with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
1054	with a variation of the composition, e.g. channel with strained layer for increasing the mobility

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1. WO2002101833 - MULTIPLE GATE INSULATORS WITH STRAINED SEMICONDUCTOR HETEROSTRUCTURES