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1. (WO2002058128) METHOD AND APPARATURS FOR TREATING SUBSTRATE
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2002/058128 International Application No.: PCT/JP2002/000268
Publication Date: 25.07.2002 International Filing Date: 17.01.2002
Chapter 2 Demand Filed: 06.08.2002
IPC:
H01L 21/00 (2006.01) ,H01L 21/3105 (2006.01) ,H01L 21/312 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31
to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
3105
After-treatment
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31
to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
312
Organic layers, e.g. photoresist
Applicants:
MIZUTANI, Yoji [JP/JP]; JP (UsOnly)
YAMAGUCHI, Masao [JP/JP]; JP (UsOnly)
TOKYO ELECTRON LIMITED [JP/JP]; 3-6, Akasaka 5-chome Minato-ku, Tokyo 107-8481, JP (AllExceptUS)
Inventors:
MIZUTANI, Yoji; JP
YAMAGUCHI, Masao; JP
Agent:
KANEMOTO, Tetsuo ; Kanemoto, Kameya, Hagiwara and Inoue Shinjuku Akebonobashi Building 1-12, Sumiyoshicho Shinjuku-ku, Tokyo 162-0065, JP
Priority Data:
2001-1238419.01.2001JP
2001-3094007.02.2001JP
Title (EN) METHOD AND APPARATURS FOR TREATING SUBSTRATE
(FR) PROCEDE ET DISPOSITIF POUR LE TRAITEMENT D'UN SUBSTRAT
Abstract:
(EN) A method of treating a substrate which comprises forming an interlayer insulating layer through application and irradiating the layer with an electron ray in a treatment chamber, thereby curing the interlayer insulating layer. The method allows an interlayer insulating layer to be cured in a markedly shorter time than that required for a conventional method.
(FR) L'invention concerne un procédé relatif au traitement d'un substrat, qui consiste à former une couche intermédiaire isolante par application de rayonnement électronique sur la couche visée, aux fins d'irradiation, à l'intérieur d'une chambre de traitement. Cela permet de traiter ladite couche dans un laps de temps nettement plus bref que par un procédé classique.
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Designated States: CN, KR, SG, US
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)