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1. WO2002035603 - WAFER PROVER DEVICE, AND CERAMIC SUBSTRATE USED FOR WAFER PROVER DEVICE

Publication Number WO/2002/035603
Publication Date 02.05.2002
International Application No. PCT/JP2001/003770
International Filing Date 01.05.2001
IPC
G01R 1/04 2006.01
GPHYSICS
01MEASURING; TESTING
RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
1Details of instruments or arrangements of the types covered by groups G01R5/-G01R13/122
02General constructional details
04Housings; Supporting members; Arrangements of terminals
G01R 31/28 2006.01
GPHYSICS
01MEASURING; TESTING
RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
31Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
28Testing of electronic circuits, e.g. by signal tracer
H01L 21/683 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
683for supporting or gripping
CPC
G01R 1/0408
GPHYSICS
01MEASURING; TESTING
RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
1Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
02General constructional details
04Housings; Supporting members; Arrangements of terminals
0408Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
G01R 31/2831
GPHYSICS
01MEASURING; TESTING
RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
31Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
28Testing of electronic circuits, e.g. by signal tracer
282Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
2831Testing of materials or semi-finished products, e.g. semiconductor wafers or substrates
H01L 21/6833
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; ; Apparatus not specifically provided for elsewhere
683for supporting or gripping
6831using electrostatic chucks
6833Details of electrostatic chucks
Applicants
  • IBIDEN CO., LTD. [JP]/[JP] (AllExceptUS)
  • ITO, Atsushi [JP]/[JP] (UsOnly)
  • HIRAMATSU, Yasuji [JP]/[JP] (UsOnly)
  • ITO, Yasutaka [JP]/[JP] (UsOnly)
Inventors
  • ITO, Atsushi
  • HIRAMATSU, Yasuji
  • ITO, Yasutaka
Agents
  • YASUTOMI, Yasuo
Priority Data
2000/31806418.10.2000JP
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) WAFER PROVER DEVICE, AND CERAMIC SUBSTRATE USED FOR WAFER PROVER DEVICE
(FR) DISPOSITIF D'ETALONNAGE DE TRANCHE, ET SUBSTRAT EN CERAMIQUE UTILISE DANS LEDIT DISPOSITIF D'ETALONNAGE DE TRANCHE
Abstract
(EN)
A wafer prover device which is capable of canceling stray capacitors existing in measuring circuits and hence free from noise and malfunction due to stray capacitors, characterized by comprising a wafer prover having a chuck top conductor layer formed on the surface of a ceramic substrate and a guard electrode disposed on the ceramic substrate, and a power source, wherein the power source applies voltage such that the chuck top conductor layer and the guard electrode are at substantially the same potential.
(FR)
L'invention concerne un dispositif d'étalonnage de tranche permettant de supprimer des effets capacitifs parasites existants dans des circuits de mesure, et donc de supprimer un bruit ou une panne provoqué par ces effets capacitifs parasites. Ce dispositif est caractérisé en ce qu'il comprend un dispositif d'étalonnage de tranche comprenant une couche conductrice supérieure de support et une source d'alimentation appliquant une tension telle que ladite couche conductrice supérieure de support et une électrode de garde sont sensiblement au même potentiel.
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