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1. WO2002009191 - NON-VOLATILE MEMORY ELEMENT

Publication Number WO/2002/009191
Publication Date 31.01.2002
International Application No. PCT/US2001/022569
International Filing Date 18.07.2001
IPC
H01L 21/02 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/316 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
314Inorganic layers
316composed of oxides or glassy oxides or oxide-based glass
H01L 29/24 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02Semiconductor bodies
12characterised by the materials of which they are formed
24including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20 or H01L29/22246
H01L 29/78 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66Types of semiconductor device
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76Unipolar devices
772Field-effect transistors
78with field effect produced by an insulated gate
CPC
H01L 21/02164
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
02104Forming layers
02107Forming insulating materials on a substrate
02109characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
02112characterised by the material of the layer
02123the material containing silicon
02164the material being a silicon oxide, e.g. SiO2
H01L 21/02197
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
02104Forming layers
02107Forming insulating materials on a substrate
02109characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
02112characterised by the material of the layer
02172the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
02197the material having a perovskite structure, e.g. BaTiO3
H01L 21/02266
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
02104Forming layers
02107Forming insulating materials on a substrate
02225characterised by the process for the formation of the insulating layer
0226formation by a deposition process
02263deposition from the gas or vapour phase
02266deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
H01L 21/02269
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
02104Forming layers
02107Forming insulating materials on a substrate
02225characterised by the process for the formation of the insulating layer
0226formation by a deposition process
02263deposition from the gas or vapour phase
02269deposition by thermal evaporation
H01L 21/0228
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
02104Forming layers
02107Forming insulating materials on a substrate
02225characterised by the process for the formation of the insulating layer
0226formation by a deposition process
02263deposition from the gas or vapour phase
02271deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
0228deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
H01L 28/55
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
28Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
40Capacitors
55with a dielectric comprising a perovskite structure material
Applicants
  • MOTOROLA, INC. [US]/[US]
Inventors
  • FINDER, Jeffrey, M.
  • EISENBEISER, Kurt
  • HALLMARK, Jerald, A.
Agents
  • WUAMETT, Jennifer, B.
Priority Data
09/624,75424.07.2000US
Publication Language English (en)
Filing Language English (EN)
Designated States
Title
(EN) NON-VOLATILE MEMORY ELEMENT
(FR) ELEMENT DE MEMOIRE NON VOLATILE SUR UN SUBSTRAT SEMI-CONDUCTEUR MONOCRISTALLIN
Abstract
(EN) High quality epitaxial layers (26) of compound semiconductor materials can be grown overlying large silicon wafers (22) by first growing an accommodating buffer layer (24) on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer (28) of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. Utilizing this technique permits (20) the fabrication of thin film non-volatile memory elements on a monocrystalline silicon substrate.
(FR) L'invention concerne des couches épitaxiales de qualité élevée (26) de matériaux semi-conducteurs de composant pouvant être développés sur de grandes tranches de silicium (22) en développant dans un premier temps une couche tampon d'accommodation (24) sur une tranche de silicium. La couche tampon d'accommodation est une couche d'oxyde monocristallin séparée de la tranche de silicium par une couche interface amorphe (28) d'oxyde de silicium. La couche interface amorphe dissipe la déformation et permet de développer une couche tampon d'accommodation d'oxyde monocristallin de qualité élevée. On peut éviter tout décalage entre la couche tampon d'accommodation et le substrat de silicium sous-jacent grâce à la couche interface amorphe. L'utilisation de cette technique (20) permet en outre de fabriquer des éléments de mémoire non volatile de film fin sur un substrat de silicium monocristallin.
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