WO2002003466 MOS TRANSISTOR INTEGRATION

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Publication Number WO/2002/003466

Publication Date 10.01.2002

International Application No. PCT/US2001/020914

International Filing Date 29.06.2001

Chapter 2 Demand Filed 28.01.2002

IPC

CPC

Applicants

INFINEON TECHNOLOGIES NORTH AMERICA CORP. [US]/[US]
INTERNATIONAL BUSINESS MACHINES CORPORATION [US]/[US]

Inventors

COSTRINI, Gregory
SEITZ, Mihel

Agents

BRADEN, Stanton, C.
EPPING HERMANN & FISCHER

Priority Data

09/606,330

29.06.2000

Publication Language English (en)

Filing Language English (EN)

Designated States

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Title

(EN) MOS TRANSISTOR INTEGRATION

(FR) INTEGRATION MOL AMELIOREE

Abstract

(EN) A method of fabricating a semiconductor device in which the bitlines and the bitline contacts are fabricated utilizing a single masking step in which line-space resist patterns are employed in defining the regions for the bitlines and the bitline contacts. The method utilizes a first line-space resist pattern and a second line-space resist pattern which is perpendicularly aligned to the first line-space resist pattern to form bitlines that are self-aligned to the bitline contacts.

(FR) Cette invention se rapporte à un procédé servant à fabriquer un dispositif à semi-conducteur, dans lequel les lignes de bits et les contacts de lignes de bits sont produits en une seule étape de masquage consistant à employer des motifs de réserve à espacement de lignes pour définir les zones des lignes de bits et des contacts de lignes de bits. Ce procédé utilise un premier motif de réserve à espacement de lignes et un second motif de réserve à espacement de lignes qui est aligné perpendiculairement au premier motif de réserve à espacement de lignes, afin de former des lignes de bits qui sont alignés automatiquement sur les contacts de lignes de bits.

H	ELECTRICITY
01	BASIC ELECTRIC ELEMENTS
L	SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21	Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02	Manufacture or treatment of semiconductor devices or of parts thereof
04	the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50	Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
60	Attaching leads or other conductive members, to be used for carrying current to or from the device in operation

H	ELECTRICITY
01	BASIC ELECTRIC ELEMENTS
L	SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21	Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02	Manufacture or treatment of semiconductor devices or of parts thereof
04	the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50	Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
60	Attaching leads or other conductive members, to be used for carrying current to or from the device in operation

H	ELECTRICITY
01	BASIC ELECTRIC ELEMENTS
L	SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21	Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70	Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
71	Manufacture of specific parts of devices defined in group H01L21/70
768	Applying interconnections to be used for carrying current between separate components within a device ; comprising conductors and dielectrics
76897	Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step

H	ELECTRICITY
01	BASIC ELECTRIC ELEMENTS
L	SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21	Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70	Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
71	Manufacture of specific parts of devices defined in group H01L21/70
768	Applying interconnections to be used for carrying current between separate components within a device ; comprising conductors and dielectrics
76897	Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step

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1. WO2002003466 - MOS TRANSISTOR INTEGRATION