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1. WO2002001788 - DUAL BIT ERROR RATE ESTIMATION IN A QAM DEMODULATOR

Publication Number WO/2002/001788
Publication Date 03.01.2002
International Application No. PCT/US2001/017382
International Filing Date 30.05.2001
Chapter 2 Demand Filed 11.01.2002
IPC
H04L 1/20 2006.1
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
1Arrangements for detecting or preventing errors in the information received
20using signal-quality detector
H04L 27/00 2006.1
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
27Modulated-carrier systems
H04L 27/38 2006.1
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
27Modulated-carrier systems
32Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18, or H04L27/26213
34Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
38Demodulator circuits; Receiver circuits
CPC
H04L 1/0057
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
1Arrangements for detecting or preventing errors in the information received
004by using forward error control
0056Systems characterized by the type of code used
0057Block codes
H04L 1/0071
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
1Arrangements for detecting or preventing errors in the information received
004by using forward error control
0056Systems characterized by the type of code used
0071Use of interleaving
H04L 1/20
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
1Arrangements for detecting or preventing errors in the information received
20using signal quality detector
H04L 2027/0032
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
27Modulated-carrier systems
0014Carrier regulation
0024at the receiver end
0026Correction of carrier offset
0032at baseband and passband
H04L 2027/0036
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
27Modulated-carrier systems
0014Carrier regulation
0024at the receiver end
0026Correction of carrier offset
0036using a recovered symbol clock
H04L 2027/0038
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
27Modulated-carrier systems
0014Carrier regulation
0024at the receiver end
0026Correction of carrier offset
0038using an equaliser
Applicants
  • ATMEL CORPORATION [US]/[US]
Inventors
  • MAALEJ, Khaled
  • HAMMAN, Emmanuel
  • DEMOL, Amaury
  • LEVY, Yannick
Agents
  • SCHNECK, Thomas
Priority Data
09/603,24523.06.2000US
Publication Language English (en)
Filing Language English (EN)
Designated States
Title
(EN) DUAL BIT ERROR RATE ESTIMATION IN A QAM DEMODULATOR
(FR) DOUBLE ESTIMATION DES TAUX D'ERREUR BINAIRE DANS UN DEMODULATEUR MAQ
Abstract
(EN) A quadrature amplitude modulation type demodulator having a dual bit error rate estimator unit (70) that allows for high bit error rate measurements. The dual bit error rate estimator circuit (70) uses information pertaining to the number of corrected bytes from a forward error correction decoder (60) and the count of recognizable patterns of the frame over a sufficiently large number of frames. The two pieces of information can be compared at the bit error rate levels, where both the pattern recognition counter (62) and the FEC decoder (60) are able to output valid data. A comparison (710) between the two pieces of information provides a way to detect the type of noise which occurs on the network and makes it easier to correct problems in signal transmission.
(FR) L'invention porte sur un démodulateur du type à modulation d'amplitude en quadrature (MAQ) présentant une unité double (70) d'estimation du taux d'erreur binaire permettant des mesures de taux élevés d'erreurs binaires. Le circuit d'estimation (70) utilise des informations sur le nombre d'octets corrigés fournies par un décodeur (60) de correction d'erreurs aval, et le comptage de motifs reconnaissables par trame sur un nombre suffisamment important de trames. Les deux éléments d'information peuvent être comparés pour ce qui est des niveaux des taux d'erreurs binaires lorsque le compteur (705) de reconnaissance de motifs et le décodeur FEC sont tous deux en mesure de produire des données valables. La comparaison entre ces deux éléments d'information est un moyen de détection du type de bruit apparaissant sur le réseau, ce qui rend plus facile la correction des problème de transmission des signaux.
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NO20026059This application is not viewable in PATENTSCOPE because the national phase entry has not been published yet or the national entry is issued from a country that does not share data with WIPO or there is a formatting issue or an unavailability of the application.
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