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1. (WO2002001626) METHOD AND APPARATUS FOR EVALUATING SEMICONDUCTOR WAFER

Pub. No.:    WO/2002/001626    International Application No.:    PCT/JP2001/005399
Publication Date: Jan 3, 2002 International Filing Date: Jun 25, 2001
IPC: G01N 1/28
H01L 21/66
Applicants: SHIN-ETSU HANDOTAI CO., LTD.

KOBAYASHI, Takeshi

Inventors: KOBAYASHI, Takeshi

Title: METHOD AND APPARATUS FOR EVALUATING SEMICONDUCTOR WAFER
Abstract:
A method and an apparatus for evaluating a semiconductor wafer by Cu deposition which enable a stable observation of defects and an accurate analysis of the distribution and density of defects, a suppression of variation of devices, batches, etc., and a stable evaluation by controlling and evaluating the Cu concentration and enables a shortening of the pretreatment time and a rapid evaluation by using a Cu reference liquid. The Cu deposition method comprises a step of forming an insulating film of a predetermined thickness on the surface of a semiconductor wafer and a step of breaking the insulating film on a defective part formed close to the surface of the semiconductor wafer and depositing Cu in a solvent on the defective part. The Cu concentration in the solvent is adjusted to a range of 0.4-30ppm and evaluation is performed.