Processing

Please wait...

Settings

Settings

Goto Application

1. WO2001059828 - BUILDING COMPONENT WITH CONSTANT DISTORSION-FREE BONDING, AND METHOD FOR BONDING

Publication Number WO/2001/059828
Publication Date 16.08.2001
International Application No. PCT/DE2001/000403
International Filing Date 02.02.2001
Chapter 2 Demand Filed 11.09.2001
IPC
H01L 21/56 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
56Encapsulations, e.g. encapsulating layers, coatings
H01L 23/16 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
16Fillings or auxiliary members in containers, e.g. centering rings
CPC
H01L 21/56
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, ; e.g. sealing of a cap to a base of a container
56Encapsulations, e.g. encapsulation layers, coatings
H01L 2224/83136
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
83using a layer connector
8312Aligning
83136involving guiding structures, e.g. spacers or supporting members
H01L 2224/83385
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
83using a layer connector
8338Bonding interfaces outside the semiconductor or solid-state body
83385Shape, e.g. interlocking features
H01L 23/16
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
16Fillings or auxiliary members in containers ; or encapsulations; , e.g. centering rings
H01L 24/32
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
24Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
31Structure, shape, material or disposition of the layer connectors after the connecting process
32of an individual layer connector
H01L 2924/01019
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2924Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
01Chemical elements
01019Potassium [K]
Applicants
  • EPCOS AG [DE]/[DE] (AllExceptUS)
  • BADER, Bernhard [DE]/[DE] (UsOnly)
  • GESCHKA, Peter [DE]/[DE] (UsOnly)
  • AGRIKOLA, Jürgen [DE]/[DE] (UsOnly)
Inventors
  • BADER, Bernhard
  • GESCHKA, Peter
  • AGRIKOLA, Jürgen
Agents
  • EPPING HERMANN & FISCHER GBR
Priority Data
100 06 447.714.02.2000DE
Publication Language German (de)
Filing Language German (DE)
Designated States
Title
(DE) BAUELEMENT MIT KONSTANT VERSPANNTER VERKLEBUNG UND VERFAHREN ZUR VERKLEBUNG
(EN) BUILDING COMPONENT WITH CONSTANT DISTORSION-FREE BONDING, AND METHOD FOR BONDING
(FR) COMPOSANT DE CONSTRUCTION A COLLAGE CONSTANT EXEMPT DE GAUCHISSEMENT ET PROCEDE DE COLLAGE
Abstract
(DE) Zur Verklebung spannungsempfindlicher Bauelementsubstrate (BS) mit einem Systemträger (ST) wird vorgeschlagen, Abstandsstrukturen (AS) zwischen den beiden zu verklebenden Oberflächen vorzusehen, die ein definierte Anordnung der beiden zu verklebenden Oberflächen gewährleistet. Die Abstandsstrukturen können mittels Siebdruck aufgebracht werden, der Raum zwischen den Abstandsstrukturen kann mit Klebstoff (K) aufgefüllt werden.
(EN) The invention provides a method for bonding stress-susceptible building component substrates (BS) with a system support (ST) by interposing spacer structures (AS) between the surfaces to be bonded, thereby allowing for a defined positioning of the surfaces to be bonded. Said spacer structures can be applied by means of screen printing and the space between the spacer structures can be filled with an adhesive (K).
(FR) L'invention concerne le collage de substrats de composants de construction sensibles aux tensions (BS) avec un support de système (ST), et consiste à prévoir des structures d'espacement (AS) entre les deux surfaces à coller, garantissant un positionnement défini des deux surfaces à coller. Les structures d'espacement peuvent être appliquées par sérigraphie, l'espace entre les structures d'espacement pouvant être rempli d'adhésif (K).
Related patent documents
Latest bibliographic data on file with the International Bureau