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1. WO2001056077 - METHOD OF FABRICATING COPPER INTERCONNECTIONS IN SEMICONDUCTOR DEVICES

Publication Number WO/2001/056077
Publication Date 02.08.2001
International Application No. PCT/US2000/025679
International Filing Date 20.09.2000
Chapter 2 Demand Filed 16.07.2001
IPC
H01L 21/768 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
71Manufacture of specific parts of devices defined in group H01L21/7086
768Applying interconnections to be used for carrying current between separate components within a device
H01L 23/532 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another
522including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
532characterised by the materials
CPC
H01L 21/76801
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
71Manufacture of specific parts of devices defined in group H01L21/70
768Applying interconnections to be used for carrying current between separate components within a device ; comprising conductors and dielectrics
76801characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
H01L 21/7681
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
71Manufacture of specific parts of devices defined in group H01L21/70
768Applying interconnections to be used for carrying current between separate components within a device ; comprising conductors and dielectrics
76801characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
76802by forming openings in dielectrics
76807for dual damascene structures
7681involving one or more buried masks
H01L 21/7688
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
71Manufacture of specific parts of devices defined in group H01L21/70
768Applying interconnections to be used for carrying current between separate components within a device ; comprising conductors and dielectrics
76838characterised by the formation and the after-treatment of the conductors
76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
7688by deposition over sacrificial masking layer, e.g. lift-off
H01L 21/76885
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
71Manufacture of specific parts of devices defined in group H01L21/70
768Applying interconnections to be used for carrying current between separate components within a device ; comprising conductors and dielectrics
76838characterised by the formation and the after-treatment of the conductors
76885By forming conductive members before deposition of protective insulating material, e.g. pillars, studs
H01L 23/53238
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another ; , i.e. interconnections, e.g. wires, lead frames
522including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
532characterised by the materials
53204Conductive materials
53209based on metals, e.g. alloys, metal silicides
53228the principal metal being copper
53238Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
H01L 23/5329
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another ; , i.e. interconnections, e.g. wires, lead frames
522including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
532characterised by the materials
5329Insulating materials
Applicants
  • ADVANCED MICRO DEVICES, INC. [US]/[US]
Inventors
  • PARK, Stephen, Keetai
Agents
  • DRAKE, Paul, S.
Priority Data
09/493,32028.01.2000US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) METHOD OF FABRICATING COPPER INTERCONNECTIONS IN SEMICONDUCTOR DEVICES
(FR) PROCEDE DE FABRICATION D'INTERCONNEXIONS DE CUIVRE DANS DES DISPOSITIFS A SEMI-CONDUCTEUR
Abstract
(EN)
A method is provided for forming a copper interconnect (1645), the method including forming a first dielectric layer (1105) above a structure layer (1100), forming a first opening in the first dielectric layer (1105), and forming a first copper structure (1125) in the first opening. The method also includes forming a sacrificial dielectric layer above the first dielectric layer (1105) and above the first copper structure (1125), forming an opening in the sacrificial dielectric layer above at least a portion of the first copper structure (1125), and forming a second copper structure (1440) in the opening, the second copper structure (1440) contacting the at least the portion of the first copper structure (1125). The method further includes removing the sacrificial dielectric layer above the first dielectric layer (1105) and adjacent the second copper structure (1440), and forming the copper interconnect (1645) by annealing the second copper structure (1440) and the first copper structure (1125).
(FR)
L'invention concerne un procédé permettant de former une interconnexion de cuivre (1645), consistant à former une première couche diélectrique (1105) par-dessus une couche de structure (1100); à former une première ouverture dans la première couche diélectrique (1105); puis, à former une première structure de cuivre (1125) dans la première ouverture. Le procédé consiste également à former une couche sacrificielle diélectrique par dessus la première couche diélectrique (1105) et par-dessus la première structure de cuivre (1125); à former une ouverture dans la couche sacrificielle diélectrique par-dessus au moins une portion de la première structure de cuivre (1125); puis à former une seconde structure de cuivre (1440) dans l'ouverture, cette seconde structure (1440) entrant en contact avec la portion au moins de la première structure de cuivre (1125). Ce procédé consiste également à retirer la couche sacrificielle diélectrique placée par-dessus la première couche diélectrique (1105) et à côté de la seconde structure de cuivre (1440); puis à former l'interconnexion de cuivre (1646) par recuit de la seconde structure de cuivre (1440) et de la première structure de cuivre (1125).
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