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1. (WO2001039273) METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE USING A HALO IMPLANTATION
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2001/039273 International Application No.: PCT/US2000/017271
Publication Date: 31.05.2001 International Filing Date: 23.06.2000
Chapter 2 Demand Filed: 15.06.2001
IPC:
H01L 21/265 (2006.01) ,H01L 21/336 (2006.01) ,H01L 29/10 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
26
Bombardment with wave or particle radiation
263
with high-energy radiation
265
producing ion implantation
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334
Multistep processes for the manufacture of devices of the unipolar type
335
Field-effect transistors
336
with an insulated gate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
06
characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
10
with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
Applicants:
ADVANCED MICRO DEVICES, INC. [US/US]; Mail Stop 68 One AMD Place Sunnyvale, CA 94088-3453, US
Inventors:
GHAEMMAGHAMI, Ahmad; US
KRIVOKAPIC, Zoran; US
SWANSON, Brian; US
Agent:
ZAHRT, William, D. II; Advanced Micro Devices, Inc. One AMD Place Mail Stop 68 Sunnyvale, CA 94088-3453, US
BROOKES BATCHELLOR; 102-108 Clerkenwell Road London EC1M 5SA, GB
Priority Data:
09/497,32003.02.2000US
60/168,15529.11.1999US
Title (EN) METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE USING A HALO IMPLANTATION
(FR) PROCEDE DE FABRICATION D'UN DISPOSITIF SEMI-CONDUCTEUR METTANT EN JEU UNE IMPLANTATION HALO
Abstract:
(EN) A method and system for providing a halo implant to a semiconductor device is disclosed. The method and system comprises providing a thin photoresist layer to the semiconductor device. The method and system further includes providing the halo implant to the appropriate area of the semiconductor device. Accordingly, in a system and method in accordance with the present invention, a photoresist that is capable of thinner profile, i.e., DUV photoresist is utilized. This will allow one to lower the photoresist thickness to the proposed 1000A (in the field) or lower if the process allows. With this photoresist thickness, taking into account other height variables, the source and drain regions can be opened only as needed. At a 45° angle, the implant can be delivered to all transistors in the circuit in the targeted area as well as getting only a large amount of the dose (up to 3/4 of the dose) to the transistor edge which sits on the trench edge. This will also minimize the counter doping of the source drain with the opposite species as is required by the definition of the halo process. In the smaller geometries of 0.18 um technologies and lower, the gate height will actually work to advantage and help reduce unwanted counter doping of the source/drain area. In this way the counter doping can be maintained to an absolute minimum. The final advantage is that with the thinner photoresist, we will enhance our ability to provide the implant to smaller geometries.
(FR) L'invention se rapporte à un procédé et à un système permettant de doter un dispositif semi-conducteur d'un implant halo. Ledit procédé consiste à former sur le dispositif semi-conducteur une fine couche de photorésine. Il consiste ensuite à déposer l'implant halo sur la surface appropriée du dispositif semi-conducteur. Dans le système et le procédé conformes à la présente invention, on utilise une photorésine qui est susceptible de présenter un profil plus fin, par exemple, une photorésine DUV. Ceci permet de réduire l'épaisseur de la photorésine jusqu'à une valeur inférieure ou égale à 1000 A (dans le champ) si le processus l'autorise. En raison de cette épaisseur de photorésine, et en tenant compte d'autres variables de hauteur, il est possible d'ouvrir les régions de source et de drain uniquement lorsque cela est nécessaire. A un angle de 45°, l'implant peut être placé sur tous les transistors du circuit dans la zone cible et il est également possible de déposer une grande quantité de la dose (jusqu'à 3/4 de la dose) sur le pourtour du transistor qui se situe au bord de la tranchée. Ceci permet également de minimiser le contre-dopage de la source et du drain avec des espèces opposées ainsi que cela est requis par la définition du processus halo. Dans le cas de structures de plus petites dimensions, inférieures ou égales à 0,18 um, la hauteur de la grille est telle qu'elle permet de réduire avantageusement le contre-dopage non désiré de la zone de source/drain. De cette manière, il est possible de maintenir le contre-dopage à un minimum absolu. Enfin, l'épaisseur réduite de photorésine permet d'accroître la capacité de dépôt de l'implant sur des structures de dimensions inférieures.
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Designated States: CN, JP, KR, SG
European Patent Office (EPO) (AT, BE, CH, CY, DE, DK, ES, FI, FR, GB, GR, IE, IT, LU, MC, NL, PT, SE)
Publication Language: English (EN)
Filing Language: English (EN)